IMX8MQ HDMI doesn't work for Some monitors

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IMX8MQ HDMI doesn't work for Some monitors

436 次查看
hiteshviradiya
Contributor III

@weidong_sun  I saw you supported in personal communication with similar error, see below problem we are facing:

We have imx8mq based custom product (with kernel : 4.14.98) where in we are playing RTP stream on HDMI out. While we configure the HDMI to 720p50/60 It works well but while setting the output to 1080p25/30, we see unsupported clock frequency. See more detailed log below:

[ 1.583520] [drm:drm_core_init] Initialized
[ 1.592814] nwl_dsi-imx mipi_dsi@30A00000: Added drm bridge!
[ 1.599678] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 1.606377] [drm] No driver support for vblank timestamp query.
[ 1.612605] nwl-mipi-dsi 30a00000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=1, format=0x0 flags=0x405
[ 1.626022] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (2)
[ 1.626046] [drm:drm_irq_install] irq=36
[ 1.626088] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (2)
[ 1.626099] [drm:drm_mode_object_get] OBJ ID: 37 (2)
[ 1.626105] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (3)
[ 1.626133] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (3)
[ 1.626187] [drm:drm_mode_object_get] OBJ ID: 37 (2)
[ 1.628285] [drm:drm_mode_object_get] OBJ ID: 40 (1)
[ 1.628294] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (4)
[ 1.628303] [drm:drm_mode_object_get] OBJ ID: 37 (3)
[ 1.628310] [drm:drm_mode_object_get] OBJ ID: 37 (4)
[ 1.628322] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (6)
[ 1.628331] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (6)
[ 1.628465] [drm:drm_calc_timestamping_constants] crtc 30: hwmode: htotal 286, vtotal 328, vdisplay 320
[ 1.628472] [drm:drm_calc_timestamping_constants] crtc 30: clock 6500 kHz framedur 14432000 linedur 44000
[ 1.648751] [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
[ 1.657465] [drm:drm_handle_vblank] vblank event on 2, current 2
[ 1.657487] [drm:drm_mode_object_get] OBJ ID: 40 (2)
[ 1.657495] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (5)
[ 1.657531] [drm:drm_mode_object_get] OBJ ID: 40 (3)
[ 1.657538] [drm:drm_mode_object_get] OBJ ID: 41 (1)
[ 1.657546] [drm:drm_mode_object_put.part.0] OBJ ID: 41 (2)
[ 1.657555] [drm:drm_mode_object_get] OBJ ID: 40 (4)
[ 1.657561] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (5)
[ 1.657569] [drm:drm_mode_object_get] OBJ ID: 37 (5)
[ 1.657575] [drm:drm_mode_object_get] OBJ ID: 37 (6)
[ 1.657581] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (7)
[ 1.657587] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (6)
[ 1.657593] [drm:drm_mode_object_get] OBJ ID: 37 (5)
[ 1.657602] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (7)
[ 1.657657] [drm:drm_calc_timestamping_constants] crtc 30: hwmode: htotal 286, vtotal 328, vdisplay 320
[ 1.657663] [drm:drm_calc_timestamping_constants] crtc 30: clock 6500 kHz framedur 14432000 linedur 44000
[ 1.671935] [drm:drm_handle_vblank] vblank event on 3, current 3
[ 1.671953] [drm:drm_mode_object_get] OBJ ID: 40 (4)
[ 1.671959] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (5)
[ 1.671966] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (6)
[ 1.671972] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (5)
[ 1.671978] [drm:drm_mode_object_put.part.0] OBJ ID: 41 (1)
[ 1.671987] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (4)
[ 1.673219] [drm:drm_mode_object_get] OBJ ID: 40 (3)
[ 1.673226] [drm:drm_mode_object_get] OBJ ID: 43 (1)
[ 1.673234] [drm:drm_mode_object_put.part.0] OBJ ID: 43 (2)
[ 1.673243] [drm:drm_mode_object_get] OBJ ID: 40 (4)
[ 1.673249] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (5)
[ 1.673257] [drm:drm_mode_object_get] OBJ ID: 37 (5)
[ 1.673263] [drm:drm_mode_object_get] OBJ ID: 37 (6)
[ 1.673269] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (7)
[ 1.673275] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (6)
[ 1.673281] [drm:drm_mode_object_get] OBJ ID: 37 (5)
[ 1.673289] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (7)
[ 1.673342] [drm:drm_calc_timestamping_constants] crtc 30: hwmode: htotal 286, vtotal 328, vdisplay 320
[ 1.673348] [drm:drm_calc_timestamping_constants] crtc 30: clock 6500 kHz framedur 14432000 linedur 44000
[ 1.686411] [drm:drm_handle_vblank] vblank event on 4, current 4
[ 1.686429] [drm:drm_mode_object_get] OBJ ID: 40 (4)
[ 1.686435] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (5)
[ 1.686442] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (6)
[ 1.686448] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (5)
[ 1.686454] [drm:drm_mode_object_put.part.0] OBJ ID: 43 (1)
[ 1.686462] [drm:drm_mode_object_put.part.0] OBJ ID: 40 (4)
[ 1.693916] mxsfb_drm 30320000.lcdif: fb0: frame buffer device
[ 1.699926] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (5)
[ 1.699934] [drm:drm_minor_register]
[ 1.699939] [drm:drm_minor_register]
[ 1.699944] [drm:drm_minor_register]
[ 1.700246] [drm:drm_minor_register] new minor registered 0
[ 1.700402] [drm:drm_sysfs_connector_add] adding "DSI-1" to sysfs
[ 1.700408] [drm:drm_sysfs_hotplug_event] generating hotplug event
[ 1.700439] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (5)
[ 1.700444] [drm] Initialized mxsfb-drm 1.0.0 20160824 for 30320000.lcdif on minor 0
[ 7.140384] [drm:vblank_disable_fn] disabling vblank on crtc 0
[ 9.243107] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 9.249742] [drm] No driver support for vblank timestamp query.
[ 9.255960] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops [imx_dcss_crtc])
[ 9.265008] [drm] CDN_API_General_Test_Echo_Ext_blocking - APB(ret = 0 echo_resp = echo test)
[ 9.273653] [drm] CDN_API_General_getCurVersion - ver 26098 verlib 20691
[ 9.280405] [drm] Pixel clock frequency: 594000 KHz, character clock frequency: 594000, color depth is 8-bit.
[ 9.290468] [drm] Pixel clock frequency (594000 KHz) is supported in this color depth (8-bit). Settings found in row 27
[ 9.308105] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_pll0_ip_div : 0x03
[ 9.308109] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmn_ref_clk_dig_div : 0x1
[ 9.308113] [drm:phy_cfg_hdp_t28hpc] set_field_value() divider_scaler : 0x1
[ 9.308117] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_pll0_fb_div_low : 0x20C
[ 9.308121] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_pll0_fb_div_high : 0x084
[ 9.308125] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_pll0_pxdiv_low : 0x003
[ 9.308129] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_pll0_pxdiv_high : 0x003
[ 9.308133] [drm:phy_cfg_hdp_t28hpc] set_field_value() vco_ring_select : 1
[ 9.308137] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_hs_clk_0_sel : 1
[ 9.308140] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_hs_clk_1_sel : 1
[ 9.308144] [drm:phy_cfg_hdp_t28hpc] set_field_value() tx_subrate : 1
[ 9.308148] [drm:phy_cfg_hdp_t28hpc] set_field_value() cmnda_pll0_hs_sym_div_sel: 0x0
[ 9.308150] [drm] VCO frequency is 5940000
[ 9.312371] [drm] VCO frequency (5940000 KHz) is supported. Settings found in row 14
[ 9.320180] [drm:phy_cfg_hdp_t28hpc] set_field_value() voltage_to_current_coarse : 0x7
[ 9.320184] [drm:phy_cfg_hdp_t28hpc] set_field_value() voltage_to_current : 0x3
[ 9.320188] [drm:phy_cfg_hdp_t28hpc] set_field_value() ndac_ctrl : 0x1
[ 9.320192] [drm:phy_cfg_hdp_t28hpc] set_field_value() pmos_ctrl : 0x00
[ 9.320196] [drm:phy_cfg_hdp_t28hpc] set_field_value() ptat_ndac_ctrl : 0x07
[ 9.320200] [drm:phy_cfg_hdp_t28hpc] set_field_value() charge_pump_gain : 0x042
[ 9.320204] [drm:phy_cfg_hdp_t28hpc] set_field_value() coarse_code : 244
[ 9.320208] [drm:phy_cfg_hdp_t28hpc] set_field_value() v2i_code : 8
[ 9.320211] [drm:phy_cfg_hdp_t28hpc] set_field_value() vco_cal_code : 292
[ 9.323162] [drm:imx_arc_power_up] arc_power_up()
[ 9.323177] [drm:imx_arc_calibrate] aux_cal_cfg() ARC programming
[ 9.333583] [drm:imx_arc_config] arc_config() ARC programming
[ 9.344492] [drm] CDN_API_General_Write_Register_blocking LANES_CONFIG ret = 0
[ 9.351743] [drm] Failed to get HDCP config - using HDCP 2.2 only
[ 9.357954] [drm] Failed to initialize HDCP
[ 9.366747] [drm] hdmi-audio-codec driver bound to HDMI
[ 9.372049] imx-drm display-subsystem: bound 32c00000.hdmi (ops imx_hdp_imx_ops)
[ 9.379577] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (2)
[ 9.379593] [drm:drm_mode_object_get] OBJ ID: 46 (2)
[ 9.379598] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (3)
[ 9.410619] [drm:imx_hdp_connector_mode_valid] pixel clock 174500 out of range
[ 9.417285] [drm:imx_hdp_connector_mode_valid] pixel clock 119000 out of range
[ 9.421778] [drm:imx_hdp_connector_mode_valid] pixel clock 88750 out of range
[ 9.426785] [drm:imx_hdp_connector_mode_valid] pixel clock 108000 out of range
[ 9.426790] [drm:imx_hdp_connector_mode_valid] pixel clock 108000 out of range
[ 9.426795] [drm:imx_hdp_connector_mode_valid] pixel clock 40000 out of range
[ 9.426800] [drm:imx_hdp_connector_mode_valid] pixel clock 36000 out of range
[ 9.426805] [drm:imx_hdp_connector_mode_valid] pixel clock 31500 out of range
[ 9.426810] [drm:imx_hdp_connector_mode_valid] pixel clock 31500 out of range
[ 9.426815] [drm:imx_hdp_connector_mode_valid] pixel clock 30240 out of range
[ 9.426820] [drm:imx_hdp_connector_mode_valid] pixel clock 25175 out of range
[ 9.426825] [drm:imx_hdp_connector_mode_valid] pixel clock 28320 out of range
[ 9.426830] [drm:imx_hdp_connector_mode_valid] pixel clock 135000 out of range
[ 9.426835] [drm:imx_hdp_connector_mode_valid] pixel clock 78750 out of range
[ 9.426840] [drm:imx_hdp_connector_mode_valid] pixel clock 75000 out of range
[ 9.426844] [drm:imx_hdp_connector_mode_valid] pixel clock 65000 out of range
[ 9.426849] [drm:imx_hdp_connector_mode_valid] pixel clock 57284 out of range
[ 9.426854] [drm:imx_hdp_connector_mode_valid] pixel clock 49500 out of range
[ 9.426859] [drm:imx_hdp_connector_mode_valid] pixel clock 50000 out of range
[ 9.426870] [drm:imx_hdp_connector_mode_valid] pixel clock 148352 out of range
[ 9.426875] [drm:imx_hdp_connector_mode_valid] pixel clock 27027 out of range
[ 9.426880] [drm:imx_hdp_connector_mode_valid] pixel clock 74176 out of range
[ 9.426885] [drm:imx_hdp_connector_mode_valid] pixel clock 25200 out of range
[ 9.426890] [drm:imx_hdp_connector_mode_valid] pixel clock 64902 out of range
[ 9.426915] [drm:drm_mode_object_get] OBJ ID: 46 (2)
[ 9.435444] imx-drm display-subsystem: fb1: frame buffer device
[ 9.441596] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (4)
[ 9.441604] [drm:drm_minor_register]
[ 9.441608] [drm:drm_minor_register]
[ 9.441611] [drm:drm_minor_register]
[ 9.441909] [drm:drm_minor_register] new minor registered 1
[ 9.442150] [drm:drm_sysfs_connector_add] adding "HDMI-A-1" to sysfs
[ 9.442155] [drm:drm_sysfs_hotplug_event] generating hotplug event
[ 9.442233] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (4)
[ 9.442238] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 1
[ 10.468424] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (4)
[ 10.501967] [drm:drm_mode_object_put.part.0] OBJ ID: 47 (1)
[ 10.502290] [drm:imx_hdp_connector_mode_valid] pixel clock 64902 out of range
[ 10.502308] [drm:imx_hdp_connector_mode_valid] pixel clock 174500 out of range
[ 10.502313] [drm:imx_hdp_connector_mode_valid] pixel clock 119000 out of range
[ 10.502318] [drm:imx_hdp_connector_mode_valid] pixel clock 88750 out of range
[ 10.502323] [drm:imx_hdp_connector_mode_valid] pixel clock 108000 out of range
[ 10.502328] [drm:imx_hdp_connector_mode_valid] pixel clock 108000 out of range
[ 10.502333] [drm:imx_hdp_connector_mode_valid] pixel clock 40000 out of range
[ 10.502338] [drm:imx_hdp_connector_mode_valid] pixel clock 36000 out of range
[ 10.502343] [drm:imx_hdp_connector_mode_valid] pixel clock 31500 out of range
[ 10.502348] [drm:imx_hdp_connector_mode_valid] pixel clock 31500 out of range
[ 10.502487] [drm:imx_hdp_connector_mode_valid] pixel clock 30240 out of range
[ 10.502492] [drm:imx_hdp_connector_mode_valid] pixel clock 25175 out of range
[ 10.502497] [drm:imx_hdp_connector_mode_valid] pixel clock 28320 out of range
[ 10.502502] [drm:imx_hdp_connector_mode_valid] pixel clock 135000 out of range
[ 10.502507] [drm:imx_hdp_connector_mode_valid] pixel clock 78750 out of range
[ 10.502512] [drm:imx_hdp_connector_mode_valid] pixel clock 75000 out of range
[ 10.502517] [drm:imx_hdp_connector_mode_valid] pixel clock 65000 out of range
[ 10.502521] [drm:imx_hdp_connector_mode_valid] pixel clock 57284 out of range
[ 10.502526] [drm:imx_hdp_connector_mode_valid] pixel clock 49500 out of range
[ 10.502531] [drm:imx_hdp_connector_mode_valid] pixel clock 50000 out of range
[ 10.502536] [drm:imx_hdp_connector_mode_valid] pixel clock 148352 out of range
[ 10.502541] [drm:imx_hdp_connector_mode_valid] pixel clock 27027 out of range
[ 10.502546] [drm:imx_hdp_connector_mode_valid] pixel clock 74176 out of range
[ 10.502551] [drm:imx_hdp_connector_mode_valid] pixel clock 25200 out of range
[ 10.502585] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (3)
[ 10.502592] [drm:drm_mode_object_get] OBJ ID: 46 (2)
[ 10.502617] [drm:drm_mode_object_get] OBJ ID: 54 (1)
[ 10.502624] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (4)
[ 10.502632] [drm:drm_mode_object_get] OBJ ID: 46 (3)
[ 10.502638] [drm:drm_mode_object_get] OBJ ID: 46 (4)
[ 10.502647] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (6)
[ 10.502654] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (6)
[ 10.502686] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (6)
[ 10.502695] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (6)
[ 10.502733] [drm:drm_calc_timestamping_constants] crtc 33: hwmode: htotal 2368, vtotal 1096, vdisplay 1080
[ 10.502740] [drm:drm_calc_timestamping_constants] crtc 33: clock 64902 kHz framedur 39988413 linedur 36485
[ 10.502789] [drm] Pixel clock frequency: 64902 KHz, character clock frequency: 64902, color depth is 8-bit.
[ 10.513527] [drm] Pixel clock frequency (64902 KHz) not supported for this color depth (8-bit)
[ 10.525127] [drm:hdmi_phy_init_t28hpc] *ERROR* failed to set phy pclock
[ 10.533173] [drm:imx_hdp_mode_setup] *ERROR* Failed to initialise HDP PHY
[ 11.108504] [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
[ 11.123375] [drm:drm_handle_vblank] vblank event on 2, current 2
[ 11.123447] [drm:drm_mode_object_get] OBJ ID: 54 (2)
[ 11.123458] [drm:drm_mode_object_put.part.0] OBJ ID: 46 (5)
[ 11.748549] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (5)
[ 16.356428] [drm:vblank_disable_fn] disabling vblank on crtc 0

Let me know if you need more information.

--

Thanks,

Hitesh

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373 次查看
hiteshviradiya
Contributor III

You can close this ticket because we were facing this while playing 1080p25/30 on not supported external HDMI monitor.

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406 次查看
Dhruvit
NXP TechSupport
NXP TechSupport
 
I hope you are doing well
 
From the error logs it seems that the display resolution is not supported by the driver t28hpc_hdmitx_table.c.
 
Please refer to the below thread for more information.
 
Thanks & Regards
Dhruvit Vasavada
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