IMX8MP spread spectrum

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

IMX8MP spread spectrum

跳至解决方案
1,665 次查看
clemntnxp
Contributor I

Hello,

I wanna add spread spectrum for my IMX8MP LVDS screen signal.

I find that the feature is available for 8QuadMax and i.MX 8QuadXPlus Display but not for i.MX 8MP.

Do you know when this will be available or there is already a patch to add it ?

Thanks.

0 项奖励
回复
1 解答
1,644 次查看
brian14
NXP TechSupport
NXP TechSupport

Hi @clemntnxp

Thank you for contacting NXP Support.

On our i.MX8MP EVK the enablement of Spread Spectrum Clocking is via software.

We don't have any code example to apply the required changes.

Here is a description of Spread Spectrum enablement for LVDS interface.

The LVDS interface doesn't have an integrated PLL such as MIPI or USB interface, therefore, LDB (LVDS Display Bridge) module uses VIDEO_PLL1 as root clock and VIDEO_PLL1 support SSCG (Spread Spectrum Clock Generator).

Here is a block diagram of LVDS interface on iMX8M Plus.

brian14_0-1716397799874.png

To enable the Spread Spectrum Clocking for LVDS interface you will need to write on VIDEO_PLL1 control register.
You will need to set SSCG_EN and the other parameters (MFR, MRR, SEL_PF, SEL_PF) with U-Boot.

For a proper setting up, please have a look to the section 5.1.5.4.4 SSCG and Fractional PLLs on the i.MX8MP Reference Manual.

Have a great day!

在原帖中查看解决方案

0 项奖励
回复
2 回复数
1,645 次查看
brian14
NXP TechSupport
NXP TechSupport

Hi @clemntnxp

Thank you for contacting NXP Support.

On our i.MX8MP EVK the enablement of Spread Spectrum Clocking is via software.

We don't have any code example to apply the required changes.

Here is a description of Spread Spectrum enablement for LVDS interface.

The LVDS interface doesn't have an integrated PLL such as MIPI or USB interface, therefore, LDB (LVDS Display Bridge) module uses VIDEO_PLL1 as root clock and VIDEO_PLL1 support SSCG (Spread Spectrum Clock Generator).

Here is a block diagram of LVDS interface on iMX8M Plus.

brian14_0-1716397799874.png

To enable the Spread Spectrum Clocking for LVDS interface you will need to write on VIDEO_PLL1 control register.
You will need to set SSCG_EN and the other parameters (MFR, MRR, SEL_PF, SEL_PF) with U-Boot.

For a proper setting up, please have a look to the section 5.1.5.4.4 SSCG and Fractional PLLs on the i.MX8MP Reference Manual.

Have a great day!

0 项奖励
回复
1,373 次查看
clemntnxp
Contributor I

It works, thank you.

0 项奖励
回复