IMX8MP micfil record data loss, when using 12.288Mhz as root clock, rate is 48k  and 8 channel

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IMX8MP micfil record data loss, when using 12.288Mhz as root clock, rate is 48k  and 8 channel

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ZenJeams
Contributor I

Hi Support,

When I using  external clock(EXT3) as  micfil's root clock, the frequency is 12.288Mhz,  ORS set 8,  clock  div is 4, the clock after frequency division meets the requirements of mic array sensor,  we found data loss when the PDM sampling rate is 48k  and channel=8.
But 48k & channel=4  or 16K & channel=8 is OK. 

Since the external clock frequency cannot be changed, how can micfil be configured for 48K & 8 channel audio sampling?

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xiaocong_fu
NXP Employee
NXP Employee

Hi @ZenJeams 

For 48k, 8ch, div=4, the div cannot meet the requirement of Minumum Required CLKDIV.

The minimum required CLKDIV value in Very Low Quality mode is:
floor(K*CLKDIV) >= K * (10+43EC) / (8*OSR) = 5.53.

We recognized you actually only need 4channels instead of 8. But the channels number you need are ch0, ch2, ch4 and ch6, they are among the 8channels. 

I have made a patch to extract only the channels you need, please have a try and let me know the result.

 

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xiaocong_fu
NXP Employee
NXP Employee

Hi @ZenJeams 

For 48k, 8ch, div=4, the div cannot meet the requirement of Minumum Required CLKDIV.

The minimum required CLKDIV value in Very Low Quality mode is:
floor(K*CLKDIV) >= K * (10+43EC) / (8*OSR) = 5.53.

We recognized you actually only need 4channels instead of 8. But the channels number you need are ch0, ch2, ch4 and ch6, they are among the 8channels. 

I have made a patch to extract only the channels you need, please have a try and let me know the result.

 

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Good (y)

 

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ZenJeams
Contributor I

hi xiaocong,

I put on your patch and removed MIC from hardware that not in use,  It doesn't seem to be having the desired effect(see the attachment).

using record command:

arecord -D hw:imxaudiomicfil,0 -f S32_LE -r 48000 -c 4 -vvv 1.wav

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