IMX8MP ARC <-> eARC transition

[robot1]

Hello NXP

I have recently gotten HPD + DDC + CEC + ARC/eARC  up and running using following components:

- fsl_xcvr.* driver.

- cec-ctl --audio

- cec-follower

- amixer - e.g. :

amixer -c imxaudioxcvr cset numid=1,iface=MIXER,name='XCVR Mode' 'ARC RX' or "eARC"

- gst-launch for routing sound to I2S output - but with 2 different pipeline setup for "ARC" and "eARC".

This on linux 5.15.71

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However I am now in a state where I cannot easily determine whenever user makes a manual transition(selection) between ARC and eARC on TV. And also I have to stop Gstreamer pipeline for re-configuring the driver for ARC or eARC (amixer). 

On dedicated eARC chips like sii9437 I used to ask the chip about the "eARC link state".

In the code implemented in fsl_xcvr.c it seems only related code is that I get an interrupt if eARC link has failed: irq0_isr(): FSL_XCVR_IRQ_ARC_MODE. Maybe this information is available in status interrupt which seems not to be implemented in fsl_xcvr.

Can you maybe help me with any ideas how to achieve my goal - here are some questions for which answers could help me on the way:

- Basically: I want to automatically runtime change mode between ARC and eARC whenever TV wants this - have you tried this? 

- Does the firmware of xcvr fully support the transition between "ARC", "DISCx", "IDLEx" & "eARC" as of HDMI specification  ("HPD" + "COMMA") with an easy way to coordinate this with e.g. cec-follower etc?  

- Would you have some more detailed design-notes / unit-test to support this?

- Is there a better way to route Audio from XCVR to I2S other than Gstreamer?

- Are there any plans to expand the functionality of fsl_xcvr with e.g. status information or HDMI state (DISC, IDLE etc.)? 

- Any other information would help?

The good thing is that I have the audio pipeline working on both ARC and eARC just need a smooth transition.

Kind Regards Flemming

[JorgeCas]

Hello,

I researched internally but we do not have a solution that implements that ARC/eARC transition automatically.

According to reference manual the different operating modes are configured with the next interrupts:

- eARC RX mode: In order to set up the AUDIO_XCVR in eARC_RX mode, load the M0 code and release it from reset. Once HPD is received, FW will enable the PHY and set up the PLL as needed.

- ARC RX mode: In order to set up the PHY and controller in ARC RX mode, assert the ARC single ended mode (IER[23]) or ARC common mode (IER[22]) interrupt. When either of these interrupts are asserted, FW will program the PHY and Controller controller registers.

- SPDIF TX mode: Host core will need to program the PHY PLL to output a 2*TX bit rate clock or 10*TX bit rate clock based on selection programmed in TX_DATAPATH_CTRL[10].

- SPDIF RX mode: This mode can be set up using IER[20]. This will set up the PHY and Controller registers as needed. SPDIF TX and RX can be operated simultaneously. If this is desired, use IER[19]. The HDMI TX SS PLL will still need to be set up by the host core.

Maybe this information could be helpful to determinate your desired transition of your design.

Best regards.

[robot1]

Thanks Jorge

I found the referred section of reference manual:
14.6.2.3 Functional Operating mode...

Seems like the handling of "single ended" / "common mode" is what can help me right now:

static const u32 fsl_xcvr_phy_arc_cfg[] = {
FSL_XCVR_PHY_CTRL_ARC_MODE_SE_EN, FSL_XCVR_PHY_CTRL_ARC_MODE_CM_EN,
};

#define FSL_XCVR_ISR_SET_ARC_CM_INT BIT(22)
#define FSL_XCVR_ISR_SET_ARC_SE_INT BIT(23)

Above defines are not used anywhere in c file.

And then I may probably have to add some intelligence myself...

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Would it be possible to get the current state of ARC / eARC functionallity: "IDLE1", "DISC1", "IDLE2", "DISC2", "ARC", "eARC"?

Because timing is everything with this...

Kind regards Flemming

[JorgeCas · Accepted solution]

Hello,

I researched on documentation if there is a register to get de state of ARC/eARC functionality but the most similar is the next, maybe could be helpful for your application.

The register "Interrupt enables for interrupt n" (EXT_IERx), has the next bit field:

ARC_MODE_IE _n

Interrupt to indicate ARC mode setup.

This interrupt enables SEL_ARC_MODE interrupt indicating eARC RX state machine could not establish a heartbeat. Check to see if ARC mode needs to be set up.

Best regards.

[robot1]

Thanks Jorge

I see there are some work to do here:-)

I will try to combine the different information and make my own "state machine awareness" on top of that.

Thanks Flemming