IMX8MM OP-TEE configuration issue

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IMX8MM OP-TEE configuration issue

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timharvey
Contributor IV

Greetings,

I'm having an issue configuring OP-TEE for a custom IMX8MM board that has 1GiB of DRAM.

I'm building imx-atf with 'make PLAT=imx8mm SPD=optee bl31'.

As the default configuration for the mx8mmevk board is CFG_UART_BASE?=UART2_BASE CFG_DDR_SIZE?=0x80000000 is apporpriate for 2GiB I'm overriding CFG_DDR_SIZE and building imx-optee-os with 'ARCH=arm CFG_DDR_SIZE=0x4000000 ./scripts/nxp_build.sh mx8mmevk'.

And I'm building U-Boot with 'ATF_LOAD_ADDR=0x920000 TEE_LOAD_ADDR=0x7e000000' as 0x7e000000 would seem appropriate for a 1GiB board based on core/arch/arm/plat-imx/conf.mk setting CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))

When I boot I'm getting a panic in TEE:

NOTICE: BL31: v2.4(release):lf-5.10.52-2.1.0-rc2-1-gf884ad7b0ba2
NOTICE: BL31: Built : 15:31:33, Oct 18 2021
E/TC:0 Panic 'issue in linear address space' at core/arch/arm/mm/core_mmu.c:2074
<check_pa_matches_va>
E/TC:0 TEE load address @ 0x7e000000
E/TC:0 Call stack:
E/TC:0 0x00000000be00be60

Any ideas?

Best regards,

Tim

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igorpadykov
NXP Employee
NXP Employee

Hi Tim

 

additional details were sent you via mail.

 

Best regards
igor

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tanner_oakes
Contributor I

I am having the exact same issue. Adjusting the parameters to account for only 1 gig of ram gives me the same error as the original poster. Can you send me the information needed to fix this problem?

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timharvey
Contributor IV

I'm sorry, I have no idea what the issue was or how I resolved it which is the problem with NXP support not sharing answers in public and just emailing them.

I did OPTEE to work on our IMX8MM boards and documented it here: http://trac.gateworks.com/wiki/venice/tee

 

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