IMX8MM M4 pwm3 signal disappear when linux boot up

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IMX8MM M4 pwm3 signal disappear when linux boot up

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coindu
Contributor IV

Hi community:

        I use IMX8MM-EVK board to test M4 driver demo,refer to the document, I download the SDK_2.5.0_EVK-MIMX8MM.tar.gz and compile a demo about pwm

SDK_2.5.0_EVK-MIMX8MM/boards/evkmimx8mm/driver_examples/pwm

       It generate ipwm.bin use SPDIF_TX pin as pwm3 (J1001 number 47).  the set some env in uboot step.

       setenv fdt_file fsl-imx8mm-evk-m4.dtb 

       setenv m4_image ipwm.bin

       setenv m4_boot_addr 0x7E0000

       setenv m4_run 'fatload mmc ${mmcdev}:${mmcpart} ${m4_boot_addr} ${m4_image};bootaux ${m4_boot_addr}'

      setenv mmcboot "run m4_run;${mmcboot}"

      save

On uboot step type `run m4_run` ,can measure the PWM signal with an oscilloscope .

But if i reset the board, when the kernel boot up ,the PWM signal will disappear,It may be that the kernel initialization CCM affects the M4 clock. 

I want to know is there any way to solve this problem.

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coindu
Contributor IV

 Finally check the pwm register and then find the way to resolve it.

  /* Stop mode disabled */
config->enableStopMode = true;
/* Doze mode disabled */
config->enableDozeMode = true;
/* Wait mode disabled */
config->enableWaitMode = true;
/* Debug mode disabled */
config->enableDebugMode = true;

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coindu
Contributor IV

 Finally check the pwm register and then find the way to resolve it.

  /* Stop mode disabled */
config->enableStopMode = true;
/* Doze mode disabled */
config->enableDozeMode = true;
/* Wait mode disabled */
config->enableWaitMode = true;
/* Debug mode disabled */
config->enableDebugMode = true;

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coindu
Contributor IV

Thanks for you reply. 

 I checked the GPT capture sample on M4 seems to hang on Linux boot  carefully. Follow Ryan Deville`s thoughts to troubleshoot the problem.

      1.  The iomux was reconfigured for a different purpose

      2.  The clocks going to the GPT IP changed (or the clock gate was disabled)

      3.  The GPT itself was reconfigured.

 PWM3 use spdif_tx pin.

1. I modify the fsl-imx8mm-evk.dts  to disable spdif . and recompile the dtb 

    & spdif{

                status = "disabled“;

    }

2. I recorded the registger value at uboot stage and at kernel boot up stage,The values are the same

pastedImage_1.png

     This result is different from what Ryan Deville encountered when solving the problem. but I still test it.

     // clks[IMX8MM_CLK_PWM3_ROOT] = imx_clk_gate4("pwm3_root_clk", "pwm3_div", base + 0x42a0, 0);

    But this modification is still not work.

    3. I don't think there are other places to modify the registers of pwm3.

    Now i have no ideal about the issue.   I attemp to test L4.19.35 image but when bootaux at uboot stage ,it will fail about "Reading file would overwrite reserved memory" .    So I test it use L4.14.98 BSP with IMX8MM-EVK board.

     If use ipwm.bin to test. On uboot stage, The pwm signal freq is 1KHZ ,when the kernel boot up ,the signal will be not 

  Any other suggestions ?

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coindu
Contributor IV

The m4ctrl has been integrated, it is the tool to run the m4 demo on the A53 side.   But this can't solve my issue. When the kernel halt, pwm3 signal is continuous . When the kernel is running normally, there is sometimes no signal. I want to know to how solve it. There is little infomation to the clock when the M4 and A53 are running at the same time.kernel_halt.jpg

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igorpadykov
NXP Employee
NXP Employee

one can check pwm3 a53 permissions in atf :

imx8mm_bl31_setup.c\imx8mm\imx\plat - imx-atf - i.MX ARM Trusted firmware 

Clocks usage is well discussed on

https://community.nxp.com/thread/500975 

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi coin

one can try alternative way to run m4 application using:

m4ctrl - M4 Control Tool for i.MX platforms 

Best regards
igor
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