IMX8MM DDR validation test with Config Tools V11

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IMX8MM DDR validation test with Config Tools V11

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slira
Contributor III

I am trying to use Config Tools V11 to run some DDR test.  I loaded in my .DS file for DDR3L memory and verified the pmic and UART commands are in ddr_config.ds.  I added them into Advanced mode > Board config as well.  The Processor we are using is MIMX8MM5DVTLZ. 

After selecting the COM I try to run any of the test and get the following error.

INFO memtool.phyinit.phy_init Run phyinit for 2017.09\ddr3
[Error]// [dwc_ddrphy_phyinit_setUserInput] unknown PhyInit field name 'Lp4RxPreambleMode[0]'

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slira
Contributor III

I have been running some more test and came across a post that is very similar to ours but it was using ddr4 memory where we are using ddr3 memory. They are also running a Nano where as we are using a MIMX8MM5DVTLZAA. We are also running a dual-die memory chip.

  The post is: https://community.nxp.com/t5/i-MX-Processors/How-to-calibrate-DDR4-on-i-MX8M-nano-with-i-MX-Mscale-D...

 

I have it down to where I am running into 1 bit being off consistently.

slira_0-1650665459071.png

 

Manually reading the address shows everything in the 0x400800000 address doesn't get the bit set.  Please see below.

slira_1-1650665580107.png

 

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Rita_Wang
NXP TechSupport
NXP TechSupport
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slira
Contributor III

I have referred to the page you have mentioned and have tried to use the standalone DDR tool but can't seem to find the correct settings.  I was to try to use Config tools to see if maybe it would give me little more insight as to what is going on.  This is the end of the log file where the error happens.

DEBUG memtool.common.factories new instance -> <memtool.processor.imx8m.mimx8mm.MIMX8MM object at 0x00000275A788FA00>
DEBUG memtool.common.factories new instance -> <memtool.processor.imx8m.mimx8mm.MIMX8MM object at 0x00000275A788FA30>
INFO memtool.phyinit.phy_init Run phyinit for 2017.09\ddr3
DEBUG memtool.phyinit.phy_init Shared library C:\ProgramData\NXP\mcu_data_v11\processors\MIMX8MM5xxxLZ\ksdk2_0\mem_validation\ddrc\phyinit\sharedlib\phyinit_2017.09_ddr3.dll
DEBUG memtool.common.factories new instance -> <memtool.phyinit.phy_init.PHYInitDriver object at 0x00000275A78C3460>
DEBUG memtool.phyinit.phy_init PHY config file C:\Users\slira\AppData\Local\Temp\mem_validation\phy_config_final.json
DEBUG memtool.phyinit.phy_init Phyinit output file C:\Users\slira\AppData\Local\Temp\mem_validation\phy_training_out_1d2d.txt
[Error]// [dwc_ddrphy_phyinit_setUserInput] unknown PhyInit field name 'Lp4RxPreambleMode[0]'

 

I am not sure what setting is tied to 'Lp4RxPreambleMode[0]'

 

If this is tied to the memory, we are using ISSI part # IS43TR16K01S2AL-125KBL.

Datasheet for ISSI part: https://www.issi.com/WW/pdf/43-46TR16K01S2A-AL.pdf

These are the settings I am using for this part. 

slira_0-1650641527567.png

When I run the test I different results in Step 2: DDR memory accessing. This is a sample of one of the runs.

slira_1-1650641664313.png

The address of failure can change on different runs as well as the both patterns.

Any insight would be much appreciated. 

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