Hello,
We are designing an SoM Board and we are using the iMX8M Mini QuadCore processor.
Our design will offer two option the last users
1 GB RAM and 2GB RAM
This SoM will have been designed with 1GB + 1GB = 2GB DDR4 RAM. But depends on the customer the second 1 GB RAM will be floating.
It means we don't assembly both RAM in every product that's why we need to design our DDR4 in Fly By topology.
Could you help me?
Q1 is there any problem with fly-by topology?
Q2 I couldn't find any guide about fly-by topology in Hardware Design Guide. Do you suggest anything?
Q2 if we left floating our first 1 GB RAM would it cause some problem.
Hi EErdem
I am afraid such guide about fly-by topology is not available.
However ddr test can support it. Probably may be useful to
perform ibis modelling for such development.
Best regards
igor