Hi all,
I have IMX8MQ EVKB board which uses 3GB MT53E768M32D4 LPDDR4 ram and another IMX8MM EVK board which uses 2GB (MT53D512M32D2) LPDDR4 ram.
I found these rams are pin, clock and power compatible so I think I can use 2GB MT53D512M32D2 for my all IMX8MQ and IMX8MM boards. But, when I check the reference schematics I found that IMX8MM EVK board have reversed A/B channels. CPU's A channel is connected to RAM's B channel and CPU's B channel is connected to RAM's A channel. Plese check the reference schematics below. I think this is done because of making routing easy. A and B channels works symmetrically. Am I right?
If so, I can route all my IMX8MM and IMX8MQ CPUs and MT53D512M32D2 RAMs and may be MT53E768M32D4 RAMs straight. A<->A, B<->B. Could you correct me?
Solved! Go to Solution.
Hello,
Yes you're correct Channel A/B were swapped on i.MX8MM EVK for easier signal routing.
There should be no problem swapping back A/B in your design. Also, it may be useful for you to take a look to the HDG for the i.MX 8M & 8MM for reference.
i.MX 8MDQLQ Hardware Developer’s Guide
i.MX 8M Mini Hardware Developer’s Guide
Regards,
Aldo.
Yes, I already have these docs. Thank you for reply
Hello,
Yes you're correct Channel A/B were swapped on i.MX8MM EVK for easier signal routing.
There should be no problem swapping back A/B in your design. Also, it may be useful for you to take a look to the HDG for the i.MX 8M & 8MM for reference.
i.MX 8MDQLQ Hardware Developer’s Guide
i.MX 8M Mini Hardware Developer’s Guide
Regards,
Aldo.