IMX7d second cpu core not powering up

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IMX7d second cpu core not powering up

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vinothkumareswa
Contributor II

Hi,

I am currently using the Compulab board,

CL-SOM-iMX7 | NXP (Freescale) i.MX 7 | System-on-Module | Computer-on-Module | CompuLab 

and trying to run the system with the kernel version:4.9.39.

I have used the Yocto build system (Pyro). I have successfully built the image and can boot the system. But after booting up, I could see that only one CPU core is activated.  The log message are as follows:

root@cl-som-imx7:~# dmesg | grep -i cpu
Booting Linux on physical CPU 0x0
CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
percpu: Embedded 14 pages/cpu @ab729000 s25996 r8192 d23156 u57344
pcpu-alloc: s25996 r8192 d23156 u57344 alloc=14*4096
pcpu-alloc: [0] 0 [0] 1
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
CPU: Testing write buffer coherency: ok
CPU0: update cpu_capacity 1024
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Brought up 1 CPUs
CPU: All CPU(s) started in SVC mode.
cpuidle: using governor ladder
cpuidle: using governor menu

cat /proc/cpuinfo
processor       : 0
model name      : ARMv7 Processor rev 5 (v7l)
BogoMIPS        : 48.00
Features        : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm
CPU implementer : 0x41
CPU architecture: 7
CPU variant     : 0x0
CPU part        : 0xc07
CPU revision    : 5

Hardware        : Freescale i.MX7 Dual (Device Tree)
Revision        : 0000
Serial          : 0000000000000000


I have compiled the kernel with Symmetric multiprocessing support. Any information on how to enable the second CPU core would be helpful.

Regards,
Vinothkumar

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fabio_estevam
NXP Employee
NXP Employee

Mainline kernel boots in non-secure world, so you need U-Boot to have PSCI to turn on the two cores.

If you want to use a mainline kernel, then please use mainline U-Boot as it has PSCI support for mx7.

Take imx7d sabresd for example, there are two U-Boot defconfigs:

mx7dsabresd_defconfig: Boots in non-secure world (suited for booting a mainline kernel)

mx7dsabresd_secure_defconfig: Boots in secure world (suited for booting NXP 4.1 kernel).

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6 Replies
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igorpadykov
NXP Employee
NXP Employee

Hi Vinothkumar

please check "maxcpus" parameter described in Table 9. Common

kernel boot parameters attached Release Notes. Also one can try with official nxp L4.1.15

releases described on

i.MX 6 / i.MX 7 Series Software and Development Tool|NXP 

Best regards
igor
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vinothkumareswa
Contributor II

Hi,

I tried with the kernel parameter maxcpus=2. Still the second CPU core is not powering up.

dmesg | grep -i cpu
Booting Linux on physical CPU 0x0
CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
percpu: Embedded 14 pages/cpu @ab725000 s25996 r8192 d23156 u57344
pcpu-alloc: s25996 r8192 d23156 u57344 alloc=14*4096
pcpu-alloc: [0] 0 [0] 1
Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk0p2 rootwait maxcpus=2
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
        RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
CPU: Testing write buffer coherency: ok
CPU0: update cpu_capacity 1024
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Brought up 1 CPUs
CPU: All CPU(s) started in SVC mode.
cpuidle: using governor ladder
cpuidle: using governor menu

I have used the Linux version 4.1.15 from the IMX repository. With that version, I could see both the CPU cores are powering up.

Now, I am trying with the kernel version 4.9.x. With this kernel version, I couldn't run both the CPU cores from the imx7d.

Regards,

vinothkumar

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fabio_estevam
NXP Employee
NXP Employee

Mainline kernel boots in non-secure world, so you need U-Boot to have PSCI to turn on the two cores.

If you want to use a mainline kernel, then please use mainline U-Boot as it has PSCI support for mx7.

Take imx7d sabresd for example, there are two U-Boot defconfigs:

mx7dsabresd_defconfig: Boots in non-secure world (suited for booting a mainline kernel)

mx7dsabresd_secure_defconfig: Boots in secure world (suited for booting NXP 4.1 kernel).

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vinothkumareswa
Contributor II

Hi,

Thanks for the information. I would like to have secure boot.

Is there any NXP kernel version greater than 4.5 that supports secure boot.

Regards,

Vinothkumar

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fabio_estevam
NXP Employee
NXP Employee

No, there is not such kernel from NXP currently.

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fabio_estevam
NXP Employee
NXP Employee

Actually NXP has just released a 4.9 based kernel. You can get it from:

http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/log/?h=imx_4.9.11_1.0.0_ga 

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