IMX7D A7 and M4 communication, RPMSG throghput

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IMX7D A7 and M4 communication, RPMSG throghput

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nilesh_patel
Contributor II

Hi,

We are planning to use IMX7D because of the heterogeneous architecture in which DDR RAM is shared between the two cores, and can achieve the best speed across the M4 and A7 communication.

We have seen some threads to identify communication between A7 and the M4 core using RPMSG but not sure about the throughput of that. Basically we are targeting 5 to 7 Mbps transfer between the core.

We are planing to follow below approaches to achieve this,

  • Set reserved memory to 512MB of DDR RAM between the core
  • Use RPMSG lite to transfer from M4 to A7 and get the data in linux
  • If RPMSG lite getting overhead due to copy from source to destination, we are plan to transfer physical address and data size(offset) to the A7's Linux.
  • Also, If RPMSG not able to achieve that speed, then use predefined address to write by M4 and read by the A7 from the DDR RAM

We are aware about that DDR RAM is single reader and single writer from M4 and A7. So, only one can access it at a time.

Can we achieve high data transfer from M4 to A7 in anyway by taking advantage of shared memory ?

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3 Replies

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igorpadykov
NXP Employee
NXP Employee

Hi Nilesh

>Can we achieve high data transfer from M4 to A7 in anyway by taking advantage

>of shared memory ?

in general yes, 5 to 7 Mbps transfer between the cores may be feasible.

Best regards
igor
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919 Views
nilesh_patel
Contributor II

Hi Igor,

Thanks for your prompt reply. Will you please tell us, how we can achieve that transfer speed?

Best regards

Nilesh Patel

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919 Views
igorpadykov
NXP Employee
NXP Employee

Hi Nilesh

one can look at shared memory example in
FreeRTOS_BSP_1.0.1_iMX7D/middleware/multicore/open-amp/rpmsg/rpmsg_rtos.c
and optimize it for own needs:
FreeRTOS_iMX7D_1.0.1_WIN 

Best regards
igor