Hello all,
We have exactly the same issue. No responses from NXP yet?
We are looking into our schematics, and comparing with the EVK.
Our main disadvantage here is that we are using a different PHY chip (KSZ8081RNA instead of KSZ8081RNB)
Regards,
U-Boot 2023.04-lf_v2023.04+gaf7d004eaf (Jun 06 2023 - 14:59:40 +0000)
CPU: i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 50C
Reset cause: POR
Model: i.MX6 ULL 14x14 EVK Board
Board: MX6ULL 14x14 EVK
DRAM: 512 MiB
Core: 77 devices, 22 uclasses, devicetree: separate
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment
[*]-Video Link 0 (480 x 272)
[0] lcdif@21c8000, video
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc1(part 0) is current device
Net: Could not get PHY for FEC1: addr 1
Could not get PHY for FEC1: addr 1
Get shared mii bus on ethernet@2188000
:-1645649280 is connected to . Reconnecting to ethernet@2188000
prefetch abort
pc : [<005fef6e>] lr : [<00002f58>]
reloc pc : [<e8f86f6e>] lr : [<e898af58>]
sp : 9de6d170 ip : 00000020 fp : 87800020
r10: 00000001 r9 : 9de75eb0 r8 : 9de776b8
r7 : 9de77658 r6 : 9de7a708 r5 : 00000002 r4 : 9eef0348
r3 : 00002f50 r2 : 0000001f r1 : ffffffff r0 : 9eef0348
Flags: nzCv IRQs off FIQs off Mode SVC_32 (T)
Code: data abort
pc : [<9ee79a46>] lr : [<9ee79a2d>]
reloc pc : [<87801a46>] lr : [<87801a2d>]
sp : 9de6d078 ip : 00000020 fp : 87800020
r10: 9eed8f37 r9 : 9de75eb0 r8 : 9eed8f2f
r7 : 00000004 r6 : 00000020 r5 : 005fef6e r4 : fffffffc
r3 : 00000001 r2 : 9de76298 r1 : 00000000 r0 : 00000006
Flags: NzCv IRQs on FIQs on Mode SVC_32 (T)
Code: e8bd 45f0 f04a bfa7 (f835) 2014
Resetting CPU ...
resetting ...