IMX6ULL- DDR3 2lot x8bit

[duyhai]

i am designing iMX6ULL with 2slot 512Mbx8. Can the NXP team help me with the schematic?

[duyhai]

[riteshmpatel]

Hi @duyhai,

I hope you are doing well.

Please share the schematic pdf for review since the image is not properly visible.

Thanks & Regards,
Ritesh M Patel

[duyhai]

this is my design

[riteshmpatel]

Hi @duyhai,

The DDR3L schematic section seems okay.

Thanks & Regards,
Ritesh M Patel

[duyhai]

thank you!

I want to swap datastream, how should I configure in kernel?

[riteshmpatel]

Hi @duyhai,

I request you to please raise a new ticket for your additional queries.

Thanks & Regards,
Ritesh M Patel

[duyhai]

file:///G:/02.WORKING/3.DICOM/01.DOCUMENT/01.HARDWARE/3-ICS/02.%20NAVCOM/01.NAVCOM_2050PB/01.%20Thiet_ke/NAVCOM_2050PB/NAVCOM_2050PB.pdf