IMX6UL wm8960 used SAI1 failed

[jiangzhifei]

#Hello,

I encounter an audio problem on our IMX6UL board.

But the board uses SAI1,  it's different from IMX6ULEVK which uses SAI2.

I  use ALSA "aplay" utility  to test.

But can't play successfully.

error message:

aplay -D "plug:SLAVE='hw:0,0'" /test/test.wav
Playing WAVE '/test/test.wav' : Signed 16 bit Little Endian, Rate 22050 Hz, Stereo
aplay: pcm_write:1682: write error: Input/output error

I will be appreciated if someone can help to fix the issue.

Thanks.

kernel start message:

...

[ 5.359750] imx-wm89601 sound1.14: wm8960-hifi <-> 2028000.sai mapping ok
[ 5.368187] imx-wm89601 sound1.14: snd-soc-dummy-dai <-> 2034000.asrc mapping ok
[ 5.375877] imx-wm89601 sound1.14: wm8960-hifi <-> 2028000.sai mapping ok
...
[ 5.575216] ALSA device list:
[ 5.578342] #0: wm8960-audio

Our DTS configuration is modified as below.

IMX6UL.dtsi:

sai1: sai@02028000 {
   compatible = "fsl,imx6ul-sai";
   reg = <0x02028000 0x4000>;
   interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clks IMX6UL_CLK_SAI1_IPG>,
   <&clks IMX6UL_CLK_SAI1>,
   <&clks 0>, <&clks 0>;
   clock-names = "bus", "mclk1", "mclk2", "mclk3";
   dma-names = "rx", "tx";
   dmas = <&sdma 35 25 0>, <&sdma 36 25 0>;
   status = "disabled";
};

imx6ul-14x14-evk-7.dts:

sound {
   compatible = "fsl,imx6ul-evk-wm8960",
   "fsl,imx-audio-wm8960";
   model = "wm8960-audio";
   cpu-dai = <&sai1>;
   audio-codec = <&codec1>;
   asrc-controller = <&asrc>;
   codec-master;
   gpr = <&gpr>;
   audio-routing =
   "Headset Jack", "HP_L",
   "Headset Jack", "HP_R",
   "Ext Spk", "SPK_LP",
   "Ext Spk", "SPK_LN",
   "Ext Spk", "SPK_RP",
   "Ext Spk", "SPK_RN",
   "LINPUT2", "Hp MIC",
   "LINPUT3", "Hp MIC",
   "RINPUT1", "Main MIC",
   "RINPUT2", "Main MIC",
   "Hp MIC", "MICB",
   "Main MIC", "MICB",
   "CPU-Playback", "ASRC-Playback",
   "Playback", "CPU-Playback",
   "ASRC-Capture", "CPU-Capture",
   "CPU-Capture", "Capture";
};

&sai1 {
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_sai1>;

   assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
   <&clks IMX6UL_CLK_SAI1>;
   assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
   assigned-clock-rates = <0>, <11289600>;

   status = "okay";
};

pinctrl_sai1: sai1grp {
   fsl,pins = <
      MX6UL_PAD_CSI_DATA01__SAI1_MCLK 0x17088
      MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x17088
      MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA 0x11088
      MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC 0x17088
      MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x11088
   >;
};

[igorpadykov]

Hi jiang

please also check i2c entry and change clock appropriately:

&i2c2 {   ..

    codec: wm8960@1a {
        compatible = "wlf,wm8960";
        reg = <0x1a>;
        clocks = <&clks IMX6UL_CLK_SAI2>;
        clock-names = "mclk";
        wlf,shared-lrclk;
    };

may be recommended to check sai clocks with oscilloscope

Best regards
igor
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[jiangzhifei]

Hi igorpadykov

Thank you for your reply!

my i2c set:

&i2c2 {
   clock_frequency = <100000>;
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_i2c2>;
   status = "okay";

   codec1: wm8960@1a {
      compatible = "wlf,wm8960";
      reg = <0x1a>;
      clocks = <&clks IMX6UL_CLK_SAI1>;
      clock-names = "mclk";
      wlf,shared-lrclk;
   };

};

pinctrl_i2c2: i2c2grp {
   fsl,pins = <

      MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8a8
      MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8a8
   >;
};

Is there something wrong?

I'll check all the signals with an oscilloscope if my set is all correct...

[igorpadykov]

could you confirm that mclk is present on codec.

Best regards
igor

[jiangzhifei]

Hi igorpadykov

my sai1 mclk pin is CSI_DATA01,but I couldn't detect the signal when I started playing!

Is there any error in the following settings?

&i2c2 {
   clock_frequency = <100000>;
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_i2c2>;
   status = "okay";

   codec1: wm8960@1a {
      compatible = "wlf,wm8960";
      reg = <0x1a>;
      clocks = <&clks IMX6UL_CLK_SAI1>;
      clock-names = "mclk";
      wlf,shared-lrclk;
   };

};

[igorpadykov]

Hi jiang

one can try to find reason for absence mclk, please attach jtag

(or add debug printfs) and check sai1 gate bits in CCM_CCGR5,

bit MSEL in I2Sx_TCR2, I2Sx_RCR2 and iomux settings for CSI_DATA01

also try

MX6UL_PAD_CSI_DATA01__SAI1_MCLK 0x1b088

Best regards
igor

[jiangzhifei]

Hi igorpadykov

I read CCM_CCGR5, value is 0xc3ffc3ff,

29–28 bit is 00
CG14 sai1 clock (sai1_clk_enable) is 00 

00 Clock is off during all modes. Stop enter hardware handshake is disabled.

So i write 0xff3ffc3ff to CCM_CCGR5,but mclk on sai1 ( CSI_DATA01 pin ) is still no signal.

how to make a correct set?  thanks a lot !

ps:

I try to read I2Sx_TCR2, I2Sx_RCR2 too , but read failed,so I can not check them:

test code:

#define SAI_START 0x2028000
#define CCM_CCGR5 0x20C407C

void test_sai_1(void){
   void __iomem *jzf_io;
   int count = 36;
   u32 cfg;
   int i;

   jzf_io = ioremap(CCM_CCGR5,sizeof(u32));
   cfg = readl(jzf_io);
   printk(KERN_ALERT"get CCM_CCGR5 value = 0x%x\n",cfg);
   cfg = 0xf3ffc3ff;
   writel(cfg,jzf_io);
   cfg = readl(jzf_io);
   printk(KERN_ALERT"get CCM_CCGR5 value = 0x%x\n",cfg);
   iounmap(jzf_io);

   jzf_io = ioremap(SAI_START,sizeof(u32)*count);
   for(i = 0; i < count; i++){
      cfg = readl(jzf_io+i*sizeof(u32));
      printk(KERN_ALERT"get value = 0x%x\n",cfg);
   }
   iounmap(jzf_io);

}

test print:

[ 356.512952] get CCM_CCGR5 value = 0xc3ffc3ff
[ 356.518408] get CCM_CCGR5 value = 0xf3ffc3ff
[ 356.523665] get value = 0x0
[ 356.528536] get value = 0x0
[ 356.531363] get value = 0x0
[ 356.534170] get value = 0x0
[ 356.537810] get value = 0x0
[ 356.540634] get value = 0x0
[ 356.543442] get value = 0x0
[ 356.547347] get value = 0x0
[ 356.550165] get value = 0x0
[ 356.552969] get value = 0x0
[ 356.556419] get value = 0x0
[ 356.559233] get value = 0x0
[ 356.562036] get value = 0x0
[ 356.564838] get value = 0x0
[ 356.568223] get value = 0x0
[ 356.571039] get value = 0x0
[ 356.573844] get value = 0x0
[ 356.577189] get value = 0x0
[ 356.580002] get value = 0x0
[ 356.582804] get value = 0x0
[ 356.586078] get value = 0x0
[ 356.588891] get value = 0x0
[ 356.591696] get value = 0x0
[ 356.594497] get value = 0x0
[ 356.597847] get value = 0x0
[ 356.600661] get value = 0x0
[ 356.603463] get value = 0x0
[ 356.606733] get value = 0x0
[ 356.609548] get value = 0x0
[ 356.612350] get value = 0x0
[ 356.615153] get value = 0x0
[ 356.618488] get value = 0x0
[ 356.621299] get value = 0x0
[ 356.624101] get value = 0x0
[ 356.627352] get value = 0x0
[ 356.630164] get value = 0x0

[igorpadykov]

please debug sai driver, additional info can be found in Linux Manual

included in Doc package

http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0-LINUX-DOCS&Parent_nodeId=133769948107170617... 

Best regards
igor

[jiangzhifei]

Hi igorpadykov

I add some debug print in fsl_sai.c,when i use aplay to play music, i can read I2S1_RCR2 and CCM_CCGR5 value:

root@freescale ~$ aplay -D "plug:SLAVE='hw:0,0'" /test/test.wav

......

[ 293.554447] get CCM_CCGR5 value = 0x33ffc3ff
[ 293.558775] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RCSR = 90000000
[ 293.564564] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RCR1 = 0
[ 293.569743] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RCR2 = 42000000
[ 293.575528] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RCR3 = 0
[ 293.580709] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RCR4 = 1a
[ 293.585974] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RCR5 = 0
[ 293.591155] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RDR = 0
[ 293.596250] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RFR = 0
[ 293.601340] !!!!!!!!!!!!!!!!!! 4 get FSL_SAI_RMR = 0

......

CCM_CCGR5  29–28 bit is 11 seems right.

bit MSEL in I2S1_RCR2 is 00

00 Bus Clock selected.
01 Master Clock (MCLK) 1 option selected.
10 Master Clock (MCLK) 2 option selected.
11 Master Clock (MCLK) 3 option selected.

iomux settings for CSI_DATA01

is

MX6UL_PAD_CSI_DATA01__SAI1_MCLK 0x1b088

my sai1 mclk pin is CSI_DATA01,but I couldn't detect the signal when I started playing too!

Do I need to change bit MSEL in I2S1_RCR2 value to try? 

[igorpadykov]

for MSEL please check
https://community.nxp.com/thread/448461

Best regards
igor