IMX6Q/D Muxed mode 16 bit NOR Flash interface

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IMX6Q/D Muxed mode 16 bit NOR Flash interface

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rajniks
Contributor I

I am designing a IMX6Q/D/DualLite custom. I want to use NOR Flash as boot device and interfacing it using EIM. I need to use it in muxed mode putting external latches so that address and data can be latched and provided to the flash.

Address Bus - Address[0:15] is muxed with data and hence needs to be latched during the address cycle.Can EIM_LBA can be used enable the latching of the address bus.Address[16:25] is not muxed and available directly and may be given directly to the flash.

Data Bus- Data[0:15] is muxed with address bus and hence needs latching during data cycle .Since databus is bidirectional the buffer needs to have that information.Can I use EIM_RW for direction and EIM_EB0 and EIM_EB1 ored in order to enable the latch.

Please let me know if there is any other way of implementation for 16 bit Non-multiplexed flash interface. Is there a design implementation done so that it can referred. I checked Sabre lite and other schematics and they have non muxed implementation.

Regards

Raj

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rajniks
Contributor I

Hi,

I had a related question. Can I use the parallel flash to be the boot device in muxed mode as well? Since the freescale boards are using non-multiplexed I wanted to make sure that parallel nor flash can be used as a boot device in this this mode as well.

Thanks 

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Raj,

Yes, you can. Please see section 8.5.1 of the MX6 reference manual. BOOT_CFG2[7:6] = 00 setting correspond to muxed 16-bit data boot.

Best regards.

Jorge.

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Yuri
NXP Employee
NXP Employee

You are rigth, EIM_LBA can be used to enable the latching of the address bus.

EIM_RW may be used as write strobe (affected by the WEA and WEN bit fields in the Chip

Select Configuration Registers).

EIM_OE may be used as read strobe (affected by the OEA and OEN bit fields in the Chip Select

Configuration Registers).

EIM_EB0 and EIM_EB1 may be used for byte selection.
Please refer to Table 22-2 (EIM External Signals) of the i.MX6 DQ RM for more details.

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