We are using IMX6 solo (silicon Rev 1.2) SoC based custom board, in that try to boot that from NAND.
Using kobs-ng tool (ver 11.09.01) to flash the uboot.imx to NAND but the board is not booting from NAND.
Checked the FCB, DBBT by dumping the NAND data, and they are OK.
1. Is flashing u-boot.imx is OK? or can we use u-boot.bin?
I tried u-boot.imx and u-boot.bin - both not working.
2. Do we need to do 1K padding in u-boot file for program image format? I hope the boot ROM expects it?
I tested with padding and without padding, both not working.
3. Read an errata for imx6 solo/dual lite manual - for 32kHz internal oscillator inaccuracy issue.
I use the NAND which tRST - 5/10/500 microsecond and tR = 75 microsecond. provide information (other than specified inthe errata) on this errata how to fix it.
consider the all inputs and provide inputs on how to boot the NAND and what else can be checked?
Is that related to ERR007117 - Nand boot issue?
please look below for NAND flashing
suggested to check NAND signals by oscilloscope and check
SRC_SBMR1,2 if correct boot settings are used (with jtag).
Also after boot failure, one can connect i.MX6 OTG board port to the PC, if a new HID
device can be found, then ROM code entered serial download mode, which means
some error occurred in the booting process. One can also check with MFG Tool,
if it sees i.MX6 device.
Then attach the board with any JTAG debugger, such as RV-ICE or
Lauterbach and dump 0x907400 (ROM uses 0x907000 as starting address),
you should see your IVT header here if the NAND access is ok.
thanks for the reply. As of now I don't have jtag with me. Is there any other way to check it?
Regarding - Freescale Yocto i.MX6 U-Boot NAND Boot
- I already tested with the dd command to pad 0x400 bytes. But it was not helping.
Also I noted in errata that
ERR007117 ROM: When booting from NAND flash, enfc_clk_root clock is not
gated off when doing the clock source switch
My IMX6 part siliconrev is 1.2. The errata claims that the issue is fixed in silicon ver 1.2. But in one of the forum, it say we need to have silicon rev 1.3.
Also is there any consideration to be made with respect to clocking/WDOG reset?
Thanks and Regards,
ERR007117 has random behavior - sometimes
processor boots, sometimes not.
i.MX6 Solo rev.1.2 fixed it.
What do you mean by
"is there any consideration to be made with respect to clocking/WDOG reset?"
In the errata, it is mentioned that boot problems due to clocking, Watch dog reset etc. Thatsy I asked, is there anything to considered on the hard ware side with respect to clocking, reset etc.
thanks n regards,
text erratum says regarding Watch dog :
For the ROM NAND boot, there is no software workaround for this issue.
For a hardware workaround, implement an external watchdog or other reset watch
PMIC). On a successful boot, the processor toggles the external watchdog through
mechanism (for example, a GPIO) which prevents the watchdog from detecting
failure occurs, the external watchdog times out, thus resetting the processor.
one can also checki.MX_6Solo6DualLite_SABRE-AI_Linux_User's_Guide.pdf
SABRE-AI supports NAND boot.
I am afraid there are no more special docs for NAND boot.