IMX6 SPI Native Chip Select

[hrishikesh23]

Hello ,

We are trying to enable Native Chip Select for IMX6 UL Processor.

We are able to communicate with Slave device by configuring the IMX6 as master using GPIO Chip select.

But when we change the DTS configuration and Period register accordingly we do not see any response from Slave device.

I have a query: What is the function of "Hardware Trigger and Hardware Trigger Length " in IMX6UL ?

Is it related with Native chip select assertion timing ?

As there is very little description, i would request if someone can put some useful information and let me know if any issues operating IMX6UL SPI in native chip select mode.

Thanks,

[igorpadykov]

Hi Parag

for hardware trigger (HT) mode please look at

HT mode is not supported by imx6ul 

It is not related with native chip select assertion timing.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------