Hi,
I have been struggling to set the LDB clock accordingly to my LVDS display in u-boot, to display a splash screen logo. It's a 1920x1200 display with dual channel LVDS interface.
I have defined my display like this, and this works on my devkit (logo displayed in u-boot), but it doesn't on my custom board. The issue is only located in u-boot, the display works well once in the kernel on my custom board (with the same configuration).
struct display_info_t const displays[] = {{
.bus = -1,
.addr = 0,
.pixfmt = IPU_PIX_FMT_RGB24,
.detect = detect_custom_display,
.enable = lvds_enable_disable, /* lvds_enable_disable */
.mode = {
.name = "CUSTOM-WUXGA",
.refresh = 60,
.xres = 1920,
.yres = 1200,
.pixclock = 6488,
.left_margin = 60,
.right_margin = 60,
.upper_margin = 15,
.lower_margin = 15,
.hsync_len = 40,
.vsync_len = 5,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED
} }, {
It seems to be linked to the LDB clock which is set at 75 MHz, and the clock required for my screen is 154MHz. How can I change the LDB clock to get 150MHz? Default options seem to be in the range 50-75MHz.
/* set LDB0, LDB1 clk select to 011/011 */
reg = readl(&mxc_ccm->cs2cdr);
reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
| MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
/* 1 -> ~50MHz , 2 -> ~56MHz, 3 -> ~75MHz, 4 -> ~68MHz */
reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
| (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
writel(reg, &mxc_ccm->cs2cdr);
Thanks,