[IMX6 DL] How to set CS0_END in flash_header.S

[cliffhuang]

Hi,

I have problem about the DDR settings for LPDDR2.

I am using 1GB LPDDR2 2 channel (1 CS per channel).

Why should I set the CS0_END to 0x5F for channel0 and 0x3F for channel1??

Can anyone explain how to calculate the value of CS0_END?

Best regards,

Cliff

[Yuri · Accepted solution]

Hope the enclosed helps.