IMX53 change DDR3 from 1333 to 1666

[xiaoxiongdeng]

Hi,all

     Recently, we have changed imx53's DDR from DDR3-1333 to DDR3-1666. I had some questions about the ESDCTL setting in  imx53RM.pdf.

    for example:

               the ESDCTL_ESDOTC register, bit[29-27]:tAOFPD, the unit is cycle ; but bit[23-20] tANPD, the unit is clock .

               I don't konw what is the different between    cycle   and    clock .

  who can help me !

     thanks !

[gusarambula]

The tANPD delay is also in clock cycles even though the cycle/clock difference on this register’s bit definitions may cause confusion.

[xiaoxiongdeng]

Hi

     I have another question about imx53 DDR3 debug. the ESDCTL_ESDREF register ,bit [15,14] - Refresh Selector, how can I select 64KHz or  32 KHz . I can not find somewhere to explain that .

     thanks !

[gusarambula]

You would need to select this value depending on the required periodic refresh rate (tREFI) of the memory being used. There are a couple of tables you may use as reference in sections 28.5.4 and 28.121.9 of the Reference Manual.

Please note that the DDR controller of the i.MX53 supports x16/x32 DDR3 memories up to 400MHz (800 MHz data rate).

[xiaoxiongdeng]

HI , gusarambula

     thanks for your help !

     But I have another question ,  because i.MX53 support DDR3 memories only up to 400M(800Mhz data rate), so if we use DDR3-1333 or DDR3-1600 memories, the timing parameters we should set to adjust to DDR3-800 , instead of DDR3-1333 or DDR3-1600.

     Is my thinking right?

     thanks!