IMX25 PWM ipg_clk at 1Khz

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IMX25 PWM ipg_clk at 1Khz

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schuimor
Contributor I

Hello,

   I'm using PWM4 on IMX25 and the maximum ipg_clk I'm getting is 1KHz ... why?

I'm setting PWMCR (0x53FC8000) = 03c10001   .... (no Prescaler divider and ipg_clk as source)... at 50% duty, I'm get 1Khz ...

I thought this is 66Mhz clock?  Why is it coming in as 1Khz?  Help?

Thanks

Schu

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Schuimor,

In addition to Peter's comments: What pin are you using to output PWM4? Are you sure the IOMUX registers are correctly configured so this signal is actually output in the pin you desire? Please see chapter 4 of the reference manual for more info.

Best regards.

Jorge.

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schuimor
Contributor I

Hi Jorge,

I know I'm talking to the correct pin because I can set the duty cycle to 0%-25%-50%-100% and see the PWM pin on the scope change.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Schuimor,

I'm working on a test code so you can run it in your system and discard a SW issue, hope to have it ready in the next few days. In the meantime, could you please disconnect all the external circuitry you have in the PWM4 pin and try to run the PWM with the PWM4 pin disconnected? (just connect a scope, of course). This will tell us if the problem is being caused by something external to the i.MX.

Best regards.

Jorge.

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schuimor
Contributor I

Hello Jorge, did you get the chance to do some test code I can use?

I tried the following steps on the IMX25 DevKit from Freescale and see the same issues.

  1- I remove 0 ohm resistor R197 from CPU board to free up PWM4

  2- In  u-boot-2009.08 code from Freescale board_init() I did:

    mxc_request_iomux(MX25_PIN_GPIO_C, MUX_CONFIG_ALT1);

      mxc_iomux_set_pad(MX25_PIN_GPIO_C, PAD_CTL_PKE_NONE);

  // 0x53FC8000
#define IMX_PWM_BASE0x53FC8000
#define PWMCR    __REG(IMX_PWM_BASE + 0x00)    /* PWM Control Register  */
#define PWMSR    __REG(IMX_PWM_BASE + 0x04)    /* PWM Sample Register  */

#define PWMIR    __REG(IMX_PWM_BASE + 0x08)    /*  INTR */

#define PWMSAR    __REG(IMX_PWM_BASE + 0x0C)    /* PWM Sample    */

#define PWMPR__REG(IMX_PWM_BASE + 0x10)    /* PWM Period    */
#define PWMCNR__REG(IMX_PWM_BASE + 0x14)    /* PWM Period    */

    //printf("**** Resetting PWM\n");

    PWMCR = (1 << 3); /* Reset PWM4 */

    while ((PWMCR) & (1 << 3)) {}

    //    printf("**** Reset complete \n" );

    PWMPR = 0xFFFE;  /* period is the full 65535 cycles */

    PWMSAR =0x8000;  /* default duty cycle is 50% */

    PWMCR =

  ((0xf << 22) |
  (0x1   << 16) | /* ipg_clk is the clock source (66MHz)*/
    ((0) << 4)  | /* divide by 1 to get a 66 MHz clock source */
    (0x0   << 1)  | /* use each sample 1 time (actually we don't use the fifo */
    (0x1   << 0)) ;  /* PWM enable */

    PWMPR = 0xFFFE;  /* period is the full 65535 cycles */

    PWMSAR =0x8000;  /* default duty cycle is 50% */

  3- I still see the clock on PWM4 at 1Khz.

  I also tested PWM1 (TP8 with code changes) on Freescale DevKit and see the same issue.

It seems to either be a processor bug or something missing in the clock configs somewhere. But again, this is as is code from Freescale's u-boot-2009.08 code.

Any help would be appreciated.

Thanks

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Schu,

Yes I do! Unfortunately I haven't been able to test, sorry, too much work lately, but I know this is very important for you, so it is for us too, so I'll test it and sent you comments asap. I'm attaching the code, it's very simple:

- It configures the IOMUX

- Outputs the IPG_CLK at the CLKO pin so you can check it at the same time as the PWM

- Configures the PWM -> IPG_CLK source divided by 2, 50% duty cycle

- Runs the PWM


I used PWM4 just as you are, muxed at the LCDC_CONTRAST pin.

Hope it helps!

I'll get back with more comments and test results very soon.

Best regards.

Jorge.

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schuimor
Contributor I

Hello Jorge,

  Thanks a lot for your example. Although setting the PERIOD to 0 isn't correct since it has to be greater than duty for it to work, it actually showed me how to configure the registers to the correct values and get any freq I want.

I think I have it figured out now.

Thanks a lot for the brainstorming and help... really appreciate it!!!!!

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Schu,

Thanks! I didn't realize I was setting the period to 0, that would have been something I would have found out when testing. Anyways, I'm glad you solved your issue. Please don't hesitate to contact us if you need anything else.

Best regards.

Jorge.

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tech_nist
Contributor I

Jorge ,

I am also trying to get 1 KHZ from  PWM2 via GPIO_A pin of imx25 .

in my case i "need 1Khz pwm" via buzzer .

The settings are  as in the previous post :

1)changed  #define IMX_PWM_BASE    0x53FA0000 //PWM2 base

2) IOMUX setting

mxc_request_iomux(MX25_PIN_GPIO_A, MUX_CONFIG_ALT1); //PWM2

mxc_iomux_set_pad(MX25_PIN_GPIO_A, PAD_CTL_PKE_NONE);

3) finally  clock and   PWM  setting

   valpr = 0xFFFE;  /* period is the full 65535 cycles */

   valsar =0x8000;  /* default duty cycle is 50% */

    valcr =

        ((0xf << 22) |

        (0x1   << 16) | /* ipg_clk is the clock source (66MHz)*/

        ((0) << 4)  | /* divide by 1 to get a 66 MHz clock source */

        (0x0   << 1)  | /* use each sample 1 time (actually we don't use the fifo */

        (0x1   << 0)) ;  /* PWM enable */

    valpr = 0xFFFE;  /* period is the full 65535 cycles */

   printk("\n ---> setting1  ) ");

   writel(0x5f980064,MCR);

   writel(valpr,PWMPR);

   writel(valsar,PWMSAR);

   writel(valcr,PWMCR);

   val = readl(PWMCR);

   writel((val|0x01),PWMCR); //ENABLE PWM

I am not getting the PWM @buzzer   which is connected via MOSFET  .

The buzzer beeps if the  MX25_PIN_GPIO_A is GPIO via sw bit bang .

Please help .

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schuimor
Contributor I

Hello Jorge,   disconnected all components from PWM4 and still at 1KHz.

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peter_pinewski
NXP Employee
NXP Employee

Couple of thoughts:

1 - how are you measuring the pwm frequency?  Note that with digital scopes, you can get into aliasing of the scope and acutally see a slower frequency than what is really present.  Try to change the time base of the scope to make sure that this is not happening.

2 - it is recommended that the period and the sample registers are set up before the PWM is enabled via the PWMCR register.

3- read the PWMCR register to make sure that it is really programmed to what you desire.

4 - enable the CLKO pin with the ipg_clk to make sure the ipg_clk is set to what you desire.  This is done in the Miscellaneous Control Register (MCR). Please see the imx25 reference manual for details.

Regards,

Peter

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schuimor
Contributor I

Hi Peter,

1) The digital scope is working fine, It has been confirmed by two users/scopes.

2) Yes, the sample/period are done before enable PWM

3) Yes, it is programmed as I set it

4) CLKO was set and tested with MCR set to the Ungated_arm, Ungate ipg_clk and Gated ipg_clk.

Still with all the above, I still see 1Khz on PWM pin. Keep in mind that I know I'm talking to the correct pin because I can set the duty cycle to 0%-25%-50%-100% and see the PWM pin on the scope change. I can even see the backlight (connect to PWM change brightness too).... but this 1Khz is causing flicker on brightness.

I set MCR (mm.l 0x53F80064) to those test values:

5f980064

5f940064

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