Hi,
你可以在中断处理的时候写入少量日志。至于写入哪个存储器,可以选择QSPI FLASH,也可以选择emmc。
WDOG can generate an interrupt request to delay resets.
When interrupts are enabled (INT = 1), and after a reset-triggering event (such as a counter timeout or invalid refresh attempt), WDOG:
1. Generates an interrupt request.
2. Waits 128 bus clocks (from the interrupt vector fetch, not the reset-triggering event).
3. Forces a reset.
This process allows the ISR to perform tasks such as analyzing the stack to debug code. When interrupts are disabled (INT = 0), WDOG does not wait before forcing a reset
Best Regards,
Zhiming