I2S microphone (SPH0645LM4H) Driver Implementation with i.mx6ul

[hitesh_kasera]

Hi,

I am working with 1 I2S microphone (SPH0645LM4H) which is connected to i.MX6UL I2s Interface. I want to record audio from this mems. My device tree set up for the same is:

/ {
   sound {
      compatible = "fsl,imx-audio-sph0645",
                           "fsl,imx-mic-sph0645";
      model = "sph0645-audio";
      cpu-dai = <&sai1>;
   };
};

&sai1 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_sai1>;

    /*
     * Reference block.
     *
     * Codec dependent section.
     */
    assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
            <&clks IMX6UL_CLK_SAI1>;
    assigned-clock-rates = <0>, <12288000>;
    assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;

    status = "okay";
};

The driver file main code set up like :

u32 channels = 2; //ALWAYS 2 CHANNELS  params_channels(params);
u32 rate = params_rate(params); //sampling rate

dev_err(cpu_dai->dev, "sampling rate parms_rate output rate : %d \n" , rate);
u32 bclk = rate * channels * 32; //fixed to sampling rate * 64
dev_err(cpu_dai->dev, "bclk : %d \n" , bclk);    

int ret = 0;

    /* set cpu DAI configuration */
    ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
    if (ret) {
        dev_err(cpu_dai->dev, "failed to set dai fmt\n");
        return ret;
    }

    ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, 3, 2, 32);
    if (ret) {
        dev_err(cpu_dai->dev, "failed to set dai tdm slot\n");
        return ret;
    }

    ret = snd_soc_dai_set_sysclk(cpu_dai, 0, bclk, SND_SOC_CLOCK_OUT);
    if (ret)
        dev_err(cpu_dai->dev, "failed to set cpu sysclk\n");

Issue is i am not able to get desire bit clock and frame sync clock. for example i run below mentioned command to see signals on oscilloscope.

arecord -c 2 -d 5 -f S32 -r 48000 -v /home/root/test.wav

on oscilloscope i was getting bit clock frequency around 11.086Mhz and Frame sync clock was about 173 Khz. As i am passing 48000 hz sampling rate bclk should be 3.072Mhz but here its not the case. In this case i have not attached the microphone sensor because it could get damaged due to higher frequency. i have also tried to see prints in fsl_sai.c file there i see the mclk_clk[0]= 0Hz and mclk_clk[1]=12.288Mhz.

I tried different sampling rate also such as

arecord -c 2 -d 5 -f S32 -r 16000 -v /home/root/test.wav

In this case i was getting bclk of 3.69Mhz and frame sync of 57.663 Khz which is also not according to what i have requested.

I am not able to get this issue. How its taking 11Mhz?

Thanks & Regards,

Hitesh

[hitesh_kasera]

HI Wigros,

Request you to provide your inputs so that we can get the correct master clock.

Thanks,

Hitesh

[weidong_sun]

Hi Hitesh,

  Up to now, we all don't know why SAI1_MCLK on your platform can't output 12.288MHz, but always 44.4MHz. 

So I want to spend some time to port your application to our i.MX6UL EVK, but in  recent days, I am very busy with my work, there hasn't been enough time to continue doing this.

   Probably you will have to wait some time!  At the same time, you can continue to debug it!

Have a nice day!

BR,

Weidong

[hitesh_kasera]

Thank you Wigros. let me know how things goes, in mean time i will also try to debug.

Regards,

Hitesh

[weidong_sun]

Dear Hitest,

  I.MX Expert team ask for register's value, could you help to dump them?

------------------------

Please dump the SAI registers, and see which bits has problem.

-----------------------

Have a nice day!

BR,

Weidong

[hitesh_kasera]

Hi Wigros,

i was looking into dumping the registers. There is one tool called memtool to read registers. and it can be installed using by adding IMAGE_iNSTALL_append = "imx-test" this line in the local.conf. and after adding i should just build the kernel.

Let me know is this correct way or there is any other way so that i can try out.

Regards,

HItesh

[hitesh_kasera]

Hi Wigros,

Thanks for your response!

As you said to dump the SAI registers, Can you guide me how to do the same?

Regards,

Hitesh

[hitesh_kasera]

Hi Wigros,

I have tried as you said. i have edited in device tree file as :

    sound {
        compatible = "fsl,imx-audio-sph0645",
                               "fsl,imx-mic-sph0645";
        model = "sph0645-audio";
        cpu-dai = <&sai1>;
        gpr = <&gpr 4 0x80000 0x80000>;
    };

as in past also i have enabled mclk direction in driver also. i dont see any change in master clock its the same as around 44.4Mhz. Can we check which pll its using and how this clock is coming?

Request you to please provide your inputs.

Thanks & Regards,

Hitesh

[weidong_sun]

OK, got it.

Weidong