Hi igor
I have seen the explanation in table 3-2 before but I don’t really understand this regarding the I2C.
Using the ap_2_ap_fixed works fine on usual RAM. But not on writing data to the DR register of the I2C.
Maybe a short fragment of my test code makes it clear:
chan_desc.script_addr = script_addr; //(SDMA_AP_2_AP_FIXED)
chan_desc.dma_mask[0] = 0; // No event?? also not for I2C3???
chan_desc.dma_mask[1] = 0;
chan_desc.priority = SDMA_CHANNEL_PRIORITY_LOW;
chan_desc.gpr[0:7] = 0;
bd.mode = SDMA_FLAGS_BUSY | SDMA_FLAGS_WRAP | (I2C_BUFFER_TEST << 2);
bd.buf_addr = (uint32_t) src_buf_p;
bd.ext_buf_addr = (uint32_t)&i2cRegBase->i2dr; // Using I2C3 DR = 0x021A8010
I2C part:
HW_I2C_I2SR_WR(instance, 0);
HW_I2C_I2CR_WR(instance, BM_I2C_I2CR_IEN);
HW_I2C_I2CR_WR(instance, BM_I2C_I2CR_IEN | BM_I2C_I2CR_MSTA | BM_I2C_I2CR_MTX);
sdma_channel_start(channel);
Changing the ext_buf_addr to an RAM address everything works fine.
Thanks.