I2C with SDMA on i.MX6?

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I2C with SDMA on i.MX6?

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peterw
Contributor III

Is it possible to get the I2C also working with the SDMA, like the example of the SPI?

The I2C has no equal registers like the SPI for DMA settings.

Thanks for any hints.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi peterw

sdma is not working with i2c in official BSPs and

I am afraid, this was not tested.

My suggestion was just try and test it.

Best regards

igor

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AlbertoLiberal
Contributor II

Hi Peterw

did you do any progress with the I2C SDMA? is it working now?

Thanks

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi peterw

IMX6DQRM Table A-1. SDMA Scripts Overview

shows available scripts. One can try scripts which

do not require fifo events, like ap_2_ap with

fixed address.

SDMA ap_to_ap Fixed Scripts (i.MX6DQ)

Best regards

igor

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peterw
Contributor III

Hi igor

I will try it with the ap_2_ap script.

But using this I have to run a timer which transmits the data or

can I use one of the SDMA events e.g. SDMA_EVENT_I2C3_A from the sdma_event.h file.

Even what’s the different between SDMA_EVENT_I2C3_A and SDMA_EVENT_I2C3_B?

Thanks.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi peterw

this is explained in

Table 3-2. SDMA event mapping IMX6DQRM

~igor

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peterw
Contributor III

Hi igor

I have seen the explanation in table 3-2 before but I don’t really understand this regarding the I2C.

Using the ap_2_ap_fixed works fine on usual RAM. But not on writing data to the DR register of the I2C.

Maybe a short fragment of my test code makes it clear:

chan_desc.script_addr = script_addr;  //(SDMA_AP_2_AP_FIXED)

chan_desc.dma_mask[0] = 0;               // No event?? also not for I2C3???

chan_desc.dma_mask[1] = 0;

chan_desc.priority = SDMA_CHANNEL_PRIORITY_LOW;

chan_desc.gpr[0:7] = 0;

bd.mode = SDMA_FLAGS_BUSY | SDMA_FLAGS_WRAP | (I2C_BUFFER_TEST << 2);

bd.buf_addr = (uint32_t) src_buf_p;

bd.ext_buf_addr = (uint32_t)&i2cRegBase->i2dr;  // Using I2C3 DR = 0x021A8010

I2C part:

HW_I2C_I2SR_WR(instance, 0);

HW_I2C_I2CR_WR(instance, BM_I2C_I2CR_IEN);

HW_I2C_I2CR_WR(instance, BM_I2C_I2CR_IEN | BM_I2C_I2CR_MSTA | BM_I2C_I2CR_MTX);

sdma_channel_start(channel);

Changing the ext_buf_addr to an RAM address everything works fine.

Thanks.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi peterw

sdma is not working with i2c in official BSPs and

I am afraid, this was not tested.

My suggestion was just try and test it.

Best regards

igor

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clemensgruber
Contributor III

Hi, when looking through the Linux I2C driver for the i.MX6 I saw that the driver supports DMA, however which of the SDMA channels would be suitable for rx and tx? In the SDMA event mapping, I see both channel 3 and 23 can have I2C3 as DMA source, if GPR0[6] and GPR0[1] is set. Both channel 5 and 10 can have I2C1 as DMA source but only one channel can have I2C2.

What's the reasoning behind this?

Could channel 3 be used as rx channel and 23 as tx channel in the i2c-imx driver or are they supposed to be used for something else? Would/should the ap_2_ap script be used to transfer DMA_MEM_TO_DEV and DMA_DEV_TO_MEM? I am referring to: linux/i2c-imx.c at master · torvalds/linux · GitHub (Line 283)

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igorpadykov
NXP TechSupport
NXP TechSupport

seems these dma codes are for i.MX23/28.

Also there are no any references for i.MX6 on that link.

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clemensgruber
Contributor III

​Hi Igor, but what are the I2C Events in the SDMA Event Mapping for? Those that are muxed with ECSPI Events etc.

Is there any chance of leveraging SDMA for improving an I2C driver like i2c-imx which is working on the i.MX6 just without DMA support.

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igorpadykov
NXP TechSupport
NXP TechSupport

I am not aware of examples of I2C working with SDMA.

Regarding "any chance of leveraging SDMA" - as this is not part

of standard Freescale BSP, this can be done using Freescale Professional Services

http://www.freescale.com/webapp/sps/site/overview.jsp?code=CW_PROFESSIONAL

Best regards

igor

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peterw
Contributor III

Hi Igor,

do you mean SDMA scripts as you talk about the dma codes? What exactly are the difference between the SDMA on the MX23/28 and the MX6. Isn’t it the same DSP (StarCore) on every MX series? Referring to the reference manuals from MX23/35/53/6 the SDMA seems the same (except the missing CRC unit in MX6 why?).

Is it possible to get the assembler code (scripts) of the SDMA? For now I’m using the SDMA with the given binary scripts (SDK) for the SPI transfer which is working.

B/R

Peter

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Peter

i.MX23/28 use own DMA engine, not SDMA,

quite different from SDMA.

Best regards

igor

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peterw
Contributor III

Sorry was the MX25 my mistake

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