hello.
I want to use SRAM2 with i.MX 8ULP, and I want to see how much the power consumption drops.
The function of L2_CACHE_CONTROL in SIM1_SYSCTRL0 is as follows：
0b0 - 256 KB L2 Cache + 256 KB SRAM configuration.
0b1 - 512 KB L2 Cache with no SRAM.
For NXP BSP U-Boot, set it to "0b1".
https://github.com/nxp-imx/uboot-imx/blob/lf-6.1.55-2.2.1/arch/arm/mach-imx/imx8ulp/soc.c#L1008
However, if I comment out this line, the U-Boot SPL will not be able to start U-Boot.
The log is as follows:
U-Boot SPL 2023.04-at2-5-g57cf82d-00005-g31a6c3e2f0-dirty (Jun 26 2025 - 13:08:58 +0900)
Normal Boot
ELE firmware version 1.3.0-c6f74feb
upower_apd_inst_isr: entry
upower_init: soc_id=48
upower_init: version:11.11.13
upower_init: start uPower RAM service
user_upwr_rdy_callb: soc=b
user_upwr_rdy_callb: RAM version:12.18
Turning on switches...
Turn on switches ok
Turning on memories...
Turn on memories faliure 1, err_code 6, ret_val 0x0
Turning on memories...
Turn on memories ok
Clearing DDR retention...
Clear DDR retention ok
drive: OD
SEC0: RNG instantiated
WDT: Started m33-at-wdt with servicing every 1000ms (60s timeout)
Trying to boot from BOOTROM
Boot Stage: Primary boot
image offset 0x0, pagesize 0x200, ivt offset 0x0
Load image from 0x52800 by ROM_API
: (Booting has stopped...)
Is there any other configuration required?
Regards,
mizo
