In the datasheet of I.MX7 it is given that, VDD_SOC should powerup before NVCC_DRAM and NVCC_DRAM_CKE. So whether it can be done by software. In hardware design, whether we need to take care anything for delaying NVCC_DRAM and NVCC_DRAM_CKE
Then How VDD_SOC will become high before NVCC_DRAM and NVCC_DRAM_CKE.
>How VDD_SOC will become high before NVCC_DRAM and NVCC_DRAM_CKE
in hardware. Use appropriate PMIC with power-up sequence compatible with i.MX7D datasheet
requirements.
Best regardsigor
We designed I.MX7 processor as per SABRE board. In that PMIC PF3000 is used.
So there will be correct power sequencing..right?
>We designed I.MX7 processor as per SABRE board. In that PMIC PF3000 is used.
>So there will be correct power sequencing..right?
right
Hi NIKHITHA
>whether it can be done by software..
no
>whether we need to take care anything for delaying NVCC_DRAM and NVCC_DRAM_CKE
no need.
never-displayed
