I.MX6ULL ENET1_MDC/MDIO 配置

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I.MX6ULL ENET1_MDC/MDIO 配置

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jerryyan
Contributor I

Hi ,

In dts/imx6ul-pinfunc.h , the MDIO/MDC PAD is defined as following:

#define MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x0074 0x0300 0x0578 0x0 0x0
#define MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x0074 0x0300 0x0580 0x1 0x0

but in IMX6ULLRM.pdf ,

ENET1_MDIO can only be mapped to 3 pads ,ENET1_MDIO ,ENET2_CRS , GPIO1_IO05


Which one is correct ?

Best Regards

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Carlos_Musich
NXP Employee
NXP Employee

Hi Jerry,

The Table 23-1. ENET1 External Signals and Table 23-2. ENET2 External Signals of RM are incorrect.

I will ask doc team to correct it.


Regards,
Carlos
NXP Technical Support
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Carlos_Musich
NXP Employee
NXP Employee

Hi Jerry,

you are right, it does not match. I will check and let you know.

Carlos

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