Custom build for imx6sl based on the imx6slevk, custom board built with a imx6L2evn10aa. Can't start RTC? Hardware oscillator is running, verified with scope.
Uboot startup details:
U-Boot 2013.10 (May 07 2014 - 16:59:28)
CPU: Freescale i.MX6SL rev1.0 at 792 MHz
Reset cause: WDOG
Board: WEBBG3FLIGHT
DRAM: 1 GiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Warning: failed to set MAC address
Hit any key to stop autoboot: 0
=> mtest 10095777 1095779
Testing 10095777 ... 01095779:
Pattern FFFFFFFF Writing... Reading...Iteration: 286
=>
U-Boot 2013.10 (May 07 2014 - 16:59:28)
CPU: Freescale i.MX6SL rev1.0 at 792 MHz
Reset cause: POR
Board: WEBBG3FLIGHT
DRAM: 1 GiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Warning: failed to set MAC address
Hit any key to stop autoboot: 0
mmc0 is current device
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading uImage
3798580 bytes read in 176 ms (20.6 MiB/s)
Booting from mmc ...
reading imx6sl-evk.dtb
** Unable to read file imx6sl-evk.dtb **
## Booting kernel from Legacy Image at 82000000 ...
Image Name: Linux-3.0.35-4.1.0-webbg3flight+
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3798516 Bytes = 3.6 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
Starting kernel ...
Linux version 3.0.35-4.1.0-webbg3flight+g5fc7229 (rcorrellus@A665laptop) (gcc version 4.8.1 (GCC) ) #1 PREEMPT Wed May 7 17:07:31 EDT 2014
CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: Teledyne Webb Research Glider Processor
Memory policy: ECC disabled, Data cache writeback
CPU identified as i.MX6SoloLite, silicon rev 1.0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096
Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk0p2 rootwait rw
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 1024MB = 1024MB total
Memory: 1027800k/1027800k available, 20776k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
DMA : 0xf4600000 - 0xffe00000 ( 184 MB)
vmalloc : 0xc0800000 - 0xf2000000 ( 792 MB)
lowmem : 0x80000000 - 0xc0000000 (1024 MB)
pkmap : 0x7fe00000 - 0x80000000 ( 2 MB)
modules : 0x7f000000 - 0x7fe00000 ( 14 MB)
.init : 0x80008000 - 0x80038000 ( 192 kB)
.text : 0x80038000 - 0x80aca4f4 (10826 kB)
.data : 0x80acc000 - 0x80b2ca10 ( 387 kB)
.bss : 0x80b2ca34 - 0x80b77b54 ( 301 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Preemptible hierarchical RCU implementation.
NR_IRQS:624
MXC GPIO hardware
sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms
arm_max_freq=1GHz
MXC_Early serial console at MMIO 0x2020000 (options '115200')
bootconsole [ttymxc0] enabled
Console: colour dummy device 80x30
Calibrating delay loop... 1581.05 BogoMIPS (lpj=7905280)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
devtmpfs: initialized
print_constraints: dummy:
NET: Registered protocol family 16
print_constraints: vddpu: 725 <--> 1300 mV at 1100 mV fast normal
print_constraints: vddcore: 725 <--> 1300 mV at 1100 mV fast normal
print_constraints: vddsoc: 725 <--> 1300 mV at 1200 mV fast normal
print_constraints: vdd2p5: 2000 <--> 2775 mV at 2400 mV fast normal
print_constraints: vdd1p1: 800 <--> 1400 mV at 1100 mV fast normal
print_constraints: vdd3p0: 2625 <--> 3400 mV at 3000 mV fast normal
hw-breakpoint: found 6 breakpoint and 1 watchpoint registers.
hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step.
hw-breakpoint: maximum watchpoint size is 4 bytes.
L310 cache controller enabled
l2x0: 16 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x32030000, Cache size: 262144 B
bio: create slab <bio-0> at 0
print_constraints: vmmc: 3300 mV
SCSI subsystem initialized
spi_imx imx6q-ecspi.1: probed
spi_imx imx6q-ecspi.2: probed
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Freescale USB OTG Driver loaded, $Revision: 1.55 $
i2c i2c-2: Invalid 7-bit I2C address 0x00
i2c i2c-2: Can't create device at 0x00
mc_pfuze 2-0008: ID: 0,Full lay: 1 ,Metal lay: 1
mc_pfuze 2-0008: FAB: 0 ,FIN: 0
print_constraints: PFUZE100_SW1A: 300 <--> 1875 mV at 1300 mV
print_constraints: PFUZE100_SW1B: 300 <--> 1875 mV at 300 mV
print_constraints: PFUZE100_SW1C: 300 <--> 1875 mV at 1300 mV
print_constraints: PFUZE100_SW2: 800 <--> 3950 mV at 3150 mV
print_constraints: PFUZE100_SW3A: 400 <--> 1975 mV at 1200 mV
print_constraints: PFUZE100_SW3B: 400 <--> 1975 mV at 1200 mV
print_constraints: PFUZE100_SW4: 800 <--> 3950 mV at 3300 mV
print_constraints: PFUZE100_SWBST: 5000 <--> 5150 mV at 5000 mV
print_constraints: PFUZE100_VSNVS: 1200 <--> 3000 mV at 1800 mV
print_constraints: PFUZE100_VREFDDR: at 750 mV
print_constraints: PFUZE100_VGEN1: 800 <--> 1550 mV at 1200 mV
print_constraints: PFUZE100_VGEN2: 800 <--> 1550 mV at 800 mV
print_constraints: PFUZE100_VGEN3: 1800 <--> 3300 mV at 1800 mV
print_constraints: PFUZE100_VGEN4: 1800 <--> 3300 mV at 1800 mV
print_constraints: PFUZE100_VGEN5: 1800 <--> 3300 mV at 2500 mV
print_constraints: PFUZE100_VGEN6: 1800 <--> 3300 mV at 1800 mV
MIPI CSI2 driver module loaded
Advanced Linux Sound Architecture Driver Version 1.0.24.
Bluetooth: Core ver 2.16
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP socket layer initialized
Bluetooth: SCO socket layer initialized
i2c-core: driver [max17135] using legacy suspend method
i2c-core: driver [max17135] using legacy resume method
cfg80211: Calling CRDA to update world regulatory domain
Switching to clocksource mxc_timer1
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
UDP hash table entries: 512 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 512 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
etb: probe of etb failed with error -2
etm: probe of etm.0 failed with error -2
Static Power Management for Freescale i.MX6
wait mode is enabled for i.MX6
cpaddr = c0820000 suspend_iram_base=c0818000
PM driver module loaded
IMX usb wakeup probe
cpu regulator mode:ldo_bypass
_regulator_get: get() with no identifier
mx6_cpu_regulator_init: failed to get pu regulator
i.MXC CPU frequency driver
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 2007
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
imx-sdma imx-sdma: loaded firmware 1.1
imx-sdma imx-sdma: initialized
Serial: IMX driver
imx-uart.0: ttymxc0 at MMIO 0x2020000 (irq = 58) is a IMX
console [ttymxc0] enabled, bootconsole disabled
console [ttymxc0] enabled, bootconsole disabled
imx-uart.1: ttymxc1 at MMIO 0x2024000 (irq = 59) is a IMX
imx-uart.2: ttymxc2 at MMIO 0x2034000 (irq = 60) is a IMX
imx-uart.3: ttymxc3 at MMIO 0x2038000 (irq = 61) is a IMX
imx-uart.4: ttymxc4 at MMIO 0x2018000 (irq = 62) is a IMX
fsl_rngc fsl_rngc.0: FSL RNGC Registered.
loop: module loaded
m25p80 spi1.0: m25p32 (4096 Kbytes)
Creating 1 MTD partitions on "m25p32":
0x000000000000-0x000000400000 : "bootloader"
vcan: Virtual CAN interface driver
CAN device driver interface
flexcan netdevice driver
FEC Ethernet Driver
fec_enet_mii_bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
add wake up source irq 74
fsl-ehci fsl-ehci.1: Freescale On-Chip EHCI Host Controller
fsl-ehci fsl-ehci.1: new USB bus registered, assigned bus number 1
fsl-ehci fsl-ehci.1: irq 74, io base 0x02184200
fsl-ehci fsl-ehci.1: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
ARC USBOTG Device Controller driver (1 August 2005)
mousedev: PS/2 mouse device common for all mice
i2c-core: driver [isl29023] using legacy suspend method
i2c-core: driver [isl29023] using legacy resume method
snvs_rtc snvs_rtc.0: rtc core: registered snvs_rtc as rtc0
i2c /dev entries driver
Linux video capture interface: v2.00
i2c-core: driver [mag3110] using legacy suspend method
i2c-core: driver [mag3110] using legacy resume method
i2c-core: driver [mma8450] using legacy suspend method
i2c-core: driver [mma8450] using legacy resume method
add mma8450 i2c driver
imx2-wdt imx2-wdt.0: IMX2+ Watchdog Timer enabled. timeout=60s (nowayout=1)
Bluetooth: Virtual HCI driver ver 1.3
Bluetooth: HCI UART driver ver 2.2
Bluetooth: HCIATH3K protocol initialized
Bluetooth: Generic Bluetooth USB driver ver 0.6
usbcore: registered new interface driver btusb
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci sdhci-esdhc-imx.1: no write-protect pin available!
mmc0: SDHCI controller on platform [sdhci-esdhc-imx.1] using DMA
Thermal calibration data is 0x59151169
Thermal sensor with ratio = 185
Anatop Thermal registered as thermal_zone0
anatop_thermal_probe: default cooling device is cpufreq!
dcp dcp.0: DCP crypto enabled.!
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
usbcore: registered new interface driver snd-usb-audio
Cirrus Logic CS42888 ALSA SoC Codec Driver
i2c-core: driver [cs42888] using legacy suspend method
i2c-core: driver [cs42888] using legacy resume method
imx_3stack asoc driver
Initialize HDMI-audio failed. Load HDMI-video first!
ALSA device list:
No soundcards found.
NET: Registered protocol family 26
TCP cubic registered
NET: Registered protocol family 17
can: controller area network core (rev 20090105 abi 8)
NET: Registered protocol family 29
can: raw protocol (rev 20090105)
can: broadcast manager protocol (rev 20090105 t)
Bluetooth: RFCOMM TTY layer initialized
Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM ver 1.11
Bluetooth: BNEP (Ethernet Emulation) ver 1.3
Bluetooth: BNEP filters: protocol multicast
Bluetooth: HIDP (Human Interface Emulation) ver 1.2
lib80211: common routines for IEEE802.11 drivers
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
Bus freq driver module loaded
Bus freq driver Enabled
mxc_dvfs_core_probe
DVFS driver module loaded
regulator_init_complete: PFUZE100_VGEN5: incomplete constraints, leaving on
snvs_rtc snvs_rtc.0: setting system clock to 1970-01-01 00:00:00 UTC (0)
Waiting for root device /dev/mmcblk0p2...
mmc0: host does not support reading read-only switch. assuming write-enable.
mmc0: new ultra high speed SDHC card at address aaaa
mmcblk0: mmc0:aaaa SS08G 7.40 GiB
mmcblk0: p1 p2 p3
EXT3-fs: barriers not enabled
kjournald starting. Commit interval 5 seconds
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
devtmpfs: mounted
Freeing init memory: 192K
INIT: version 2.88 booting
Starting udev
udevd[65]: starting version 182
Starting Bootlog daemon: bootlogd.
Configuring network interfaces... eth0: Freescale FEC PHY driver [Generic PHY] (mii_bus:phy_addr=1:00, irq=-1)
udhcpc (v1.21.1) started
Sending discover...
PHY: 1:00 - Link is Up - 100/Full
Sending discover...
Sending discover...
No lease, failing
Wed May 7 21:41:00 UTC 2014
INIT: Entering runlevel: 5
hwclock: can't open '/dev/misc/rtc': No such file or directory
Starting syslogd/klogd: done
Stopping Bootlog daemon: bootlogd.
Poky (Yocto Project Reference Distro) 1.5.1 webbg3flight /dev/ttymxc0
Solved! Go to Solution.
Robert
Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.
Thanks,
Yixing
stopped the boot on both machines and examined the memory and found that u-boot had set-up the register. So my issue is in the u-boot build. Where are the snvs register values set in uboot?
EVK md command data:
Hit any key to stop autoboot: 0
=> md 0x020cc004
020cc004: 80002100 00000000 00000000 00000000 .!..............
Custom board:
=> md 0x020cc004
020cc004: 00000000 00000000 00000000 00000000 ................
Robert
We have not got your response yet and will close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.
Thanks,
Yixing
Robert
If your questions had been answered, please click Correct Answer/Helpful Answer, otherwise keep exchanging your words with assignee.
Thanks,
Yixing
Hi Robert,
You need to blow SEC_CONFIG[0] in efuse to start RTC. Please refer to the following page for more details:
Q&A: How to program i.MX6 eFUSE?
For i.MX6SL fusemap, please refer to reference manual, Chapter 5.
MX6Sl EVK U-Boot > imxotp read 4
bit 1 represents SEC_CONFIG[0]
You can blow the bit and try again.
MX6Sl EVK U-Boot > imxotp blow --force 4 0x2
BR,
Jack
Robert
I will try to find an AE to help in this issue.
Thanks,
Yixing
I printed the evk rtc-snvs register in the rtc_set_time function. I noticed that the NPSWA_EN bit for the SNVS_HPCOMR register is different. Where in but boot/load process are these set? This is the bit that allows non-privileged access to the SNVS registers.
EVK registers:
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0000 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0004 ----register value = 0x80002100
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0008 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x000c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0010 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0014 ----register value = 0x80000b00
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0018 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x001c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0020 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0024 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0028 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x002c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0030 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0034 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0038 ----register value = 0x00000021
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x003c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0040 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0044 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0048 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x004c ----register value = 0x40000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0050 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0054 ----register value = 0x0007cdd4
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0058 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x005c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0060 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0064 ----register value = 0x41736166
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0068 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x006c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0070 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0074 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0078 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x007c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0080 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0084 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0088 ----register value = 0x00000000
Custom board Values:
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0000 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0004 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0008 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x000c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0010 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0014 ----register value = 0x80000900
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0018 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x001c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0020 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0024 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0028 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x002c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0030 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0034 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0038 ----register value = 0x00000020
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x003c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0040 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0044 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0048 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x004c ----register value = 0x00000008
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0050 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0054 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0058 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x005c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0060 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0064 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0068 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x006c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0070 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0074 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0078 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x007c ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0080 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0084 ----register value = 0x00000000
RMC --- func:snvs_rtc_set_time Registers Offset=> 0x0088 ----register value = 0x00000000
no I have not resolved the issue. It appears to be an issue with the rtc_snvs.c file
root@webbg3flight:~# /etc/init.d/hwclock.sh start
RMC --- func:snvs_rtc_open
RMC --- func:snvs_rtc_open exit
RMC --- func:snvs_rtc_read_time
RMC --- func:rtc_read_lp_counter
RMC --- func:rtc_read_lp_counter exit
RMC --- func:snvs_rtc_read_time exit
RMC --- func:snvs_rtc_release
RMC --- func:snvs_rtc_release exit
root@webbg3flight:~# /etc/init.d/hwclock.sh stop
RMC --- func:snvs_rtc_open
RMC --- func:snvs_rtc_open exit
RMC --- func:snvs_rtc_set_time
RMC --- func:snvs_rtc_set_time ret = 0
RMC --- func:snvs_rtc_set_time old_time = 0x0
RMC --- func:snvs_rtc_set_time lp_cr = 0x20
RMC --- func:snvs_rtc_set_time time1 = 28000 ioadr = c08e8054
RMC --- func:snvs_rtc_set_time time2 = 0x0 ioadr = 0xc08e8050
RMC --- func:snvs_rtc_set_time lp_cr = 0x21 ioadr = 0xc08e8038
RMC --- func:snvs_rtc_set_time ioaddr+LPCR = 0xc08e8038 mask = 0x1
rtc driver has been succesfully probed:
snvs_rtc snvs_rtc.0: rtc core: registered snvs_rtc as rtc0
About the error message: this is related to Yocto. I would suggest you to report it to meta-fsl-arm mailing list.
Fabio
Could you keep working on this customer's issue please?
Thanks,
Yixing
Added register writes to the SNVS register so the values are the same as the EVK board at the end of u-boot.
Not sure when or how the mx6slevk board sets these but this change in /board/freescale/custom_board/custom_board.c seem to allow a proper linux boot.
int board_early_init_f(void)
{
setup_iomux_uart();
#ifdef CONFIG_SYS_USE_SPINOR
setup_spinor();
#endif
setup_rtc(); // RMC --- added function to set the snvs registers for rtc
printf(" NOTE rmc: board_early_init_f \n");
return 0;
}
void setup_rtc(void)
{
u32 reg;
reg = 0x80002100;
writel(reg, SNVS_BASE_ADDR + SNVS_HPCOMR);
reg = 0x80000b00;
writel(reg, SNVS_BASE_ADDR + SNVS_HPSR);
reg = 0x020cc038;
writel(reg, SNVS_BASE_ADDR + SNVS_LPCR);
reg = 0x40000000;
writel(reg, SNVS_BASE_ADDR + SNVS_LPSR);
reg = 0x020cc054;
writel(reg, SNVS_BASE_ADDR + SNVS_LPSRTCLR);
}