How to use CCM_CLPCR[STBY_COUNT] bit?

[takayuki_ishii]

Hello community,

I have 2 question about CCM_CLPCR[STBY_COUNT] bit.

1) I think, that CCM wait counter count as following value. is it correct?

CCM_CGPR[0] = 0: pmic_delay_scaler = 1,

 STBY_COUNT

  00 : CCM wait (1 * 1)+ 1 = 2 CKIL cycle.

  01 : CCM wait (3 * 1)+ 1 = 4 CKIL cycle.

  10 : CCM wait (7 * 1)+ 1 = 8 CKIL cycle.

  11 : CCM wait (15 * 1)+ 1 = 16 CKIL cycle.

CCM_CGPR[0] = 1: pmic_delay_scaler = 8,

 STBY_COUNT

  00 : CCM wait (1 * 8)+ 1 = 9 CKIL cycle.

  01 : CCM wait (3 * 8)+ 1 = 25 CKIL cycle.

  10 : CCM wait (7 * 8)+ 1 = 57 CKIL cycle.

  11 : CCM wait (15 * 8)+ 1 = 121 CKIL cycle.

2) Which signal will start this counter?

   Rise-up("0" -> "1") edge of  PMIC_STBY_REQ pin?

 or Some trigger to exit STOP mode?

to set CCM_CLCR[STBY_COUNT] bit, we need a start timing of wait cycle.

End time seems that all PMIC power source will wake up to functional voltage, I think.

Best regards,

Ishii.

[takayuki_ishii]

Hello Igor,

Thank you for your quick reply.

I will ask it to my customer.

Best regards,

Ishii.

[igorpadykov · Accepted solution]

Hi Ishii

>1) I think, that CCM wait counter count as following value. is it correct?

correct

>2) Which signal will start this counter?

>  Rise-up("0" -> "1") edge of  PMIC_STBY_REQ pin?

yes it is PMIC_STBY_REQ and described in sect.18.5.3.3.2 Exiting STOP mode i.MX6DQ

Reference Manual

http://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf

>to set CCM_CLCR[STBY_COUNT] bit, we need a start timing of wait cycle.

>End time seems that all PMIC power source will wake up to functional voltage, I think.

right

Best regards
igor
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