How to settign frequecny of SAI1_MCLK in i.MX6ULL

[shanashiro]

I want to generate the SAI1_MCLK of 1.92MHz or 2.56MHz from PLL4 . the souce clock of PLL4 uses external 24MHz. Please tell me the setting values including PLL4. Especially I don't know the specific installation method of PLL4 .

[weidong_sun]

Hi,

SAIx_MCLK doesn't belong to one of the signals of SAIx IP inside CPU. It only provides a fixed 24MHz clock for external audio codec.
The 24MHz clock will be connected to MCLK pin of audio codec , to be it's work main clock.

According to your purpose, it seems that you want to generate bitclock, which should be generated by SAI1_BCLK of SAI1 IP, the bitclock's parent source is PLL.

Have a good day!

Regards,

weidong