How to set up gpio pins on iMX6SX (udoo neo) using FreeRTOS_BSP_iMX6SX?

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How to set up gpio pins on iMX6SX (udoo neo) using FreeRTOS_BSP_iMX6SX?

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alesprchal
Contributor I

Hello NXP community,

I keep struggling how to properly configure gpio_config_t structures for the udoo neo board. My goal is to set up "Arduino" pins 13 (embedded LED) and 8 for gpio. According to the schematics (www.udoo.org/download/files/schematics/UDOO_NEO_schematics.pdf) these pins are connected to the NANDF_D2 and NANDF_D5 pins on the iMX6SX side. Using FreeRTOS_BSP_1.0.0_iMX6SX/examples/imx6sx_sdb_m4/demo_apps/blinking_imx_demo as a starting point I have therefore prepared the following structures:


gpio_config_t gpio13 = {
    "GPIO13", /* name */
    &IOMUXC_SW_MUX_CTL_PAD_NAND_DATA02, /* muxReg */
    5, /* muxConfig */
    &IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02, /* padReg */
    0,
    GPIO4, /* base */
    6 /* pin */
};


gpio_config_t gpio8 = {
    "GPIO8", /* name */
    &IOMUXC_SW_MUX_CTL_PAD_NAND_DATA05, /* muxReg */
    5, /* muxConfig */
    &IOMUXC_SW_PAD_CTL_PAD_NAND_DATA05, /* padReg */
    0,
    GPIO4, /* base */
    9 /* pin */
};

Unfortunately, I cannot see any desired gpio activity (blinking LED). However, during one of my tests I have mistakenly used wrong pin config:

gpio_config_t gpio13 = {
    "GPIO13. Note that SD1_CLK pin is wrong", /* name */
    &IOMUXC_SW_MUX_CTL_PAD_SD1_CLK, /* muxReg */
    5, /* muxConfig */
    &IOMUXC_SW_PAD_CTL_PAD_SD1_CLK, /* padReg */
    0,
    GPIO4, /* base */
    6
};

And to my surprise this config somehow works, even though the mux and pad registers are wrong. So can anybody point out what is wrong with my gpio_config_t structures?

AP

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alesprchal
Contributor I

Hi Carlos,

thanks for a reply. I am working with the official Udoobuntu 2 image and the default device tree looks OK. Anyways, in the meantime I managed to solve my problem. A quick look at the code in "FreeRTOS_BSP_1.0.0_iMX6SX/examples/imx6sx_sdb_m4/gpio_pins.c" revealed that I have a mistake in my gpio_config_t structure, namely in the pad configuration. The working gpio_config_t should have the following form:

gpio_config_t gpio13 = {
  "GPIO13", /* name */
  &IOMUXC_SW_MUX_CTL_PAD_NAND_DATA02, /* muxReg */
  5, /* muxConfig */
  &IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02, /* padReg */
  IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_SPEED(2) | /* padConfig */
  IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_PKE_MASK |
  IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_DSE(6),
  GPIO4, /* base */
  6 /* pin */
};

A real showstopper was the HI-Z config (0x000000) for the DSE option.

Regards,

AP

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Carlos_Musich
NXP Employee
NXP Employee

Hi Ales,

I don´t know what OS are you using in the Cortex A9 core of the i.MX6SX. If you are using Udoobuntu I will regret to say that you may look at the UDOO resources for help.

On the other hand, you can build one of our Linux images for IMX6SXSABRESD using Yocto (If you are not familiar with Yocto you can follow this traing Yocto Training - HOME ) and deploy this image in UDOO board. Please note that the kernel used in IMX6SXSABRESD will work just fine in in UDOO Neo, but the bootloader and the Device Tree will not (the device tree file is the one that describe all the hardware including GPIOs), so you need to take the UDOO Neo bootloader from udoo repository and overwrite it. Then you need to get the Device Tree files of UDOO, build the dtb file and take it to the sdcard where you image is deployed. This procedure is explained in the following document but with the UDOO Quad board Building Linux Image with QT5 for UDOO Quad 

Please note, as I told above, the device tree describes the hardware,  the NXP BSP provides a special dtb file for using M4 core. I am not sere if UDOO provides in Device Tree files functionality for M4. In this case you may need to add this functionality yourself.


Regards,
Carlos

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alesprchal
Contributor I

Hi Carlos,

thanks for a reply. I am working with the official Udoobuntu 2 image and the default device tree looks OK. Anyways, in the meantime I managed to solve my problem. A quick look at the code in "FreeRTOS_BSP_1.0.0_iMX6SX/examples/imx6sx_sdb_m4/gpio_pins.c" revealed that I have a mistake in my gpio_config_t structure, namely in the pad configuration. The working gpio_config_t should have the following form:

gpio_config_t gpio13 = {
  "GPIO13", /* name */
  &IOMUXC_SW_MUX_CTL_PAD_NAND_DATA02, /* muxReg */
  5, /* muxConfig */
  &IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02, /* padReg */
  IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_SPEED(2) | /* padConfig */
  IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_PKE_MASK |
  IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_DSE(6),
  GPIO4, /* base */
  6 /* pin */
};

A real showstopper was the HI-Z config (0x000000) for the DSE option.

Regards,

AP

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