How to set HDMI TX PLL tunes

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How to set HDMI TX PLL tunes

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cotway
Contributor II

cotway_0-1630928294168.png

when i custom hdmi pixel clk ,i dont know how to set VCO configs.the Thirteenth table is my target(VCO_FRE=2929500),but how to config coar and cod(NDAC PMOS PTAT div-T P-Gain Coa V2I CAL)?

  pls help me. tks.

 

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igorpadykov
NXP Employee
NXP Employee
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cotway
Contributor II

@igorpadykov

However, there is still a problem with this, and the output is unstable。I only see the output for a moment。

Are you  sure modify only this structure?My problem is the red marked structure in the screenshot。

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igorpadykov
NXP Employee
NXP Employee

yes only linux structure should be updated, no need to set pll values directly.

 

Best regards
igor

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cotway
Contributor II

@igorpadykov 

Kernel version I use is 5.4.3 and only this version can be used。i get structure's parameter by HDMI - pixel clock calculation.xlsx .but these different from the code,can you update the xlsx. 

For example 148.5Mhz and vco 5940Mhz:

 code:

cotway_0-1631069647762.png

xlsx:

cotway_1-1631069874697.png

cotway_2-1631070272930.png

 

 

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cotway
Contributor II

@igorpadykov 

Do you mean that the PLL configuration must be one of these twelve?

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