How to pass data i.MX6SX M4 <--> A9 core each other.

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How to pass data i.MX6SX M4 <--> A9 core each other.

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satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6SX.

Acctually, our customer want to pass data from M4 core to A9 core, or A9 to M4.

What module can be used this usage?

(e.g. OCRAM, DDR, MU, etc...)

Best Regards,

Satoshi Shimoda

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1 解答
1,080 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Satoshi

shared memory is used for data communication between cores,

please refer to attached document Chapter 53

i.MX 6 SoloX Multi-Core Communication (MCC)

and Figure 53-1. New multi-core, multi-OS architecture

Best regards

igor

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1,081 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Satoshi

shared memory is used for data communication between cores,

please refer to attached document Chapter 53

i.MX 6 SoloX Multi-Core Communication (MCC)

and Figure 53-1. New multi-core, multi-OS architecture

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

1,080 次查看
sharmila_devada
Contributor III

Hi igor,

In Remote Processor Messaging (RPMsg), IPC APIs is supported in software ? How secure it is ? I am planning to use sc_ipc_open() sc_ipc_read(), sc_ipc_write() APIs for communication between Cortex A-35 to Cortex -M4. Can you please suggest on this .

Regards,

Sharmila

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