How to output 25 MHz Clock from RGMII_TXC pin

[mehmetipin]

Dear Community,

I have i.mx6dl based board with Micrel KSZ9021 PHY.  PHY needs 25 MHz clock from MX6 MAC to generate 125 MHz reference clock, in its RGMII mode. 

I am using u-boot 2009.08.  There is 6 MHz clock at RGMII_TXC pin. Is it possible to output 25 MHz clock from this pin?  If yes, How can I do it?

Thanks and best regards.

Mehmet Ali Ipin

[mehmetipin]

Dear Gusarambula,

Thank you for your pations and informations; Unfortunately I don't have GPIO_16 pin to generate 125MHz clock.  

I know MAC needs 125 MHZ clock from PHY/or external source. PHY(9021) also needs 25 MHz clock in its GTX_CLK pin to generate 125 MHz ENET_REF_CLK. My PHY schematic is same as MCIMX6QP-SDB. I connected RGMII_TXC to GTX_CLK and RGMII_TX_CTL pin TX_EN pin of PHY.

In fact I Have 6 MHz at RGMII_TXC pin, and PHY is generating 30 MHz(5*GTX_CLK) (if it was 25, PHY will generate 125MHz) to ENET_REF_CLK pin of MX6.

I only need informations, what should I do to generate 25 MHz clock instead of 6 MHz from RGMII_TXC pin?

[gusarambula]

Hello Mehmet Ali Ipin,

I'm currently double checking if it's possible to generate the 25Mhz clock from RGMII_TXC as your design requires. I'll update this thread as soon as I have more information.

Regards,

[MehmetAliIpin]

Dear Gusarambula,

Thank you very much for your interests.

Thanks and best regards.

[gusarambula]

Hello Mehmet Ali Ipin,

My apologies. I double checked and confirmed that it’s not possible to multiplex RGMII_TXC as 25MHz reference clock output for RGMII PHY.

i.MX6Q can output a 50MHz reference clock from GPIO_16 or RGMII_TX_CTL for RMII application. If GPIO_16 is available, it might be able to output a 25MHz clock for the RGMII PHY.

In your case since GPIO_16 is not available the best alternative would be adding a 25MHz crystal on the PHY since the RGMII_TXC pin cannot generate it.

Regards,

[MehmetAliIpin]

Dear Gusarambula,

Thank you for your informations.

Best regards.

[MehmetAliIpin]

Dear Gusarambula,

Thank you very much for your informations.

I read section 10.4.2 of Hardware guide. It explains RGMII_TX_CTL pin to generate the reference clock, and there is nothing with RGMII_TXC pin.  I am very confused;

• Are we using RGMII_TX_CTL pin in order to output clock signal from RGMII_TXC pin?
• Is it possible to generate 25 MHz clock at the RGMII_TXC pin?
• What is the reference of RGMII_TXC clock CCM_ANALOG_PLL_ENETn  or external 125 MHz?

Best regards.

Mehmet

[gusarambula]

Hello Mehmet,

My apologies for not being clear. I believe your scenario is similar to the one described on the following thread:

https://community.nxp.com/message/539982

If you wish to generate the PHY clock on the i.MX6 you may do so but you should use either GPIO_16 or RGMII_TX_CTL as output; and then input the 125MHZ from the PHY to ENET_REF_CLK.

The reason being that the RGMII_TXC pin is generated from the ENET module but the module itself requires the 125Mhz clock for RGMII. RGMII_TXC should thus be used as signal for the RGMII but not as reference clock.

Pins GPIO_16 or RGMII_TX_CTL may be used to generate the clock from the PLLs and then provide to the PHY. These pins would be controlled with register CCM_ANALOG_PLL_ENETn.

I hope this information helps!

Regards,

[gusarambula]

Hello Mehmet Ali Ipin,

You can find information on how to achieve this in section 10.4.2 of the i.MX6 Hardware Guide (link below).

http://www.nxp.com/assets/documents/data/en/user-guides/IMX6DQ6SDLHDG.pdf

Please also look at bits CCM_ANALOG_PLL_ENETn[0:1], as listed on section 18.7.15 of the i.MX6Q Reference Manual.

I hope this information helps!

Regards,