Hi:
I'm developing my own product, referring to the official ardb board of NXP, and equipped with vsc8514 on the bottom board, but I find that the driver can't be loaded all the time, as follows:
[ 3.484349] 001: libphy: VSC9959 internal MDIO bus: probed
[ 3.484693] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 0
[ 3.484972] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 1
[ 3.485224] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 2
[ 3.485473] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 3
[ 3.512835] 001: mscc_felix 0000:00:00.5 swp0 (uninitialized): PHY [0000:00:00.3:10] driver [Generic PHY]
[ 3.516374] 001: mscc_felix 0000:00:00.5 swp1 (uninitialized): PHY [0000:00:00.3:11] driver [Generic PHY]
[ 3.517087] 001: mscc_felix 0000:00:00.5 swp2 (uninitialized): PHY [0000:00:00.3:12] driver [Generic PHY]
[ 3.517779] 001: mscc_felix 0000:00:00.5 swp3 (uninitialized): PHY [0000:00:00.3:13] driver [Generic PHY]
[ 3.518125] 001: mscc_felix 0000:00:00.5: configuring for fixed/internal link mode
[ 3.518150] 001: mscc_felix 0000:00:00.5: Link is Up - 2.5Gbps/Full - flow control off
however,the ardb board has the log:
[ 3.484349] 001: libphy: VSC9959 internal MDIO bus: probed
[ 3.484693] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 0
[ 3.484972] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 1
[ 3.485224] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 2
[ 3.485473] 001: mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 3
[ 3.512835] 001: mscc_felix 0000:00:00.5 swp0 (uninitialized): PHY [0000:00:00.3:10] driver [Microsemi GE VSC8514 SyncE]
[ 3.516374] 001: mscc_felix 0000:00:00.5 swp1 (uninitialized): PHY [0000:00:00.3:11] driver [Microsemi GE VSC8514 SyncE]
[ 3.517087] 001: mscc_felix 0000:00:00.5 swp2 (uninitialized): PHY [0000:00:00.3:12] driver [Microsemi GE VSC8514 SyncE]
[ 3.517779] 001: mscc_felix 0000:00:00.5 swp3 (uninitialized): PHY [0000:00:00.3:13] driver [Microsemi GE VSC8514 SyncE]
[ 3.518125] 001: mscc_felix 0000:00:00.5: configuring for fixed/internal link mode
[ 3.518150] 001: mscc_felix 0000:00:00.5: Link is Up - 2.5Gbps/Full - flow control off
could you give me some advices?
Solved! Go to Solution.
Hi:
Thank you for your reply. Finally, it is confirmed that the mdio bus is blocked and the chip ID cannot be read.
Is it driver enabled in kernel menu?
Is NXP LSDK used for your board?
I'm using openil based on this PDF(OPEN-LINUX-IND-UM-1-10.pdf),In NXP official board (ls1028ardb), the driver can be loaded normally, but our own board can't load the driver with same image.In addition, we add a reset pin to the device tree of uboot.The modification code is as follows:
&enetc0 {
status = "okay";
phy-mode = "sgmii";
phy-handle = <&rdb_phy0>;
phy-reset-duration = <10>;
phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
phy-reset-gpios1 = <&gpio0 27 GPIO_ACTIVE_HIGH>;
phy-reset-post-delay = <230>;
};
Then add my reset code in drivers/net/fsl_enetc.c :
debug("ecetc_gpio_reset: enetc_gpio_reset(dev)\n");
if (dm_gpio_is_valid(&priv->phy_reset_gpio1)) {
dm_gpio_set_value(&priv->phy_reset_gpio1, 0);
mdelay(priv->reset_post_delay);
printf("phy2 reset time=%d\n",priv->reset_post_delay);
dm_gpio_set_value(&priv->phy_reset_gpio1, 1);
}
if (dm_gpio_is_valid(&priv->phy_reset_gpio)) {
dm_gpio_set_value(&priv->phy_reset_gpio, 0);
mdelay(priv->reset_delay);
printf("reset time=%d\n",priv->reset_delay);
dm_gpio_set_value(&priv->phy_reset_gpio, 1);
// if (priv->reset_post_delay)
// mdelay(priv->reset_post_delay);
}
Perhaps this problem concerns to connection this driver on your board. Perhaps this problem is hardware problem.
Is there problem if similar to the LS1028ARDB board configuration is used in your .dtb file.
Hi:
Thank you for your reply. Finally, it is confirmed that the mdio bus is blocked and the chip ID cannot be read.