How to get physcial ddr size?

[kris_fei]

Is there any way to get physcial ddr size in u-boot

[BiyongSUN]

If you  take look at the uboot source code in uboot, you will find follow code

you'd better to ask a software engineer to help you for the details.

3.14.52_1.1.0_ga\uboot-imx\board\freescale\mx6sabresd\mx6sabresd.c

#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
#define EPDC_PAD_CTRL    (PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)

int dram_init(void)
{
gd->ram_size = imx_ddr_size();
return 0;
}

static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
};

3.14.52_1.1.0_ga\uboot-imx\arch\arm\imx-common\cpu.c

/*
* imx_ddr_size - return size in bytes of DRAM according MMDC config
* The MMDC MDCTL register holds the number of bits for row, col, and data
* width and the MMDC MDMISC register holds the number of banks. Combine
* all these bits to determine the meme size the MMDC has been configured for
*/
unsigned imx_ddr_size(void)
{
struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
unsigned ctl = readl(&mem->ctl);
unsigned misc = readl(&mem->misc);
int bits = 11 + 0 + 0 + 1;      /* row + col + bank + width */

bits += ESD_MMDC_CTL_GET_ROW(ctl);
bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)];
bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)];
bits += ESD_MMDC_CTL_GET_WIDTH(ctl);
bits += ESD_MMDC_CTL_GET_CS1(ctl);

/* The MX6 can do only 3840 MiB of DRAM */
if (bits == 32)
  return 0xf0000000;

return 1 << bits;
}
#endif

[kris_fei]

What you mentioned is just the size i configured in u-boot, what i want is real ddr size.

For example,  i set size as  2GB in u-boot, but the read size is 1GB, however, if we don't

use the high memory more than 1GB, system still works well, so i need a way to distinguish it.

[BiyongSUN]

If you can read the code attached, the size is calculate for the DDR controllor MMDC.

That is the real physical size and what is in the uboot DCD.

It is not a fixed code.

DDR size is NOT hard coding for i.MX any more !!!!!

/*
* imx_ddr_size - return size in bytes of DRAM according MMDC config
* The MMDC MDCTL register holds the number of bits for row, col, and data
* width and the MMDC MDMISC register holds the number of banks. Combine
* all these bits to determine the meme size the MMDC has been configured for
*/
unsigned imx_ddr_size(void)
{
struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
unsigned ctl = readl(&mem->ctl);
unsigned misc = readl(&mem->misc);
int bits = 11 + 0 + 0 + 1;      /* row + col + bank + width */

bits += ESD_MMDC_CTL_GET_ROW(ctl);
bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)];
bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)];
bits += ESD_MMDC_CTL_GET_WIDTH(ctl);
bits += ESD_MMDC_CTL_GET_CS1(ctl);

/* The MX6 can do only 3840 MiB of DRAM */
if (bits == 32)
  return 0xf0000000;

return 1 << bits;
}
#endif

[Yuri]

Hello,

   DDR memory size is hard-coded in U-boot.

The recent (NXP) U-boot defines the following parameters :

PHYS_SDRAM_SIZE: Configure the DDR size in MB.

PHYS_SDRAM: Physical address for the DDR memor

  Please refer to Chapter 1 (Porting U-Boot from an i.MX 6/7

Reference Board to an i.MX 6/7 Custom Board) of "i.MX_BSP_Porting_Guide.pdf"

Have a great day,
Yuri

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[kris_fei]

What i want is the real physical ddr size rather than the size i configure in u-boot like PHYS_SDRAM_SIZE.

Is there any read register to reflect the read ddr size?

[Yuri]

Hi,

U-boot provides memory initialization via DCD Table for i.MX DRAM Initialization

Please refer to the Porting U-Boot chapter for more details.

DRAM initialization parameters (after the DCD) may be read using imx_ddr_size().

Regards,

Yuri.

[kris_fei]

Yep, i know this, however, system can boot up normally with 2GB configuration on 1GB physcial ddr platform.

There's no way to distinguish it, that's the point i wanna solve.

[Yuri]

It is neede to read i.MX6 MMDC registers as shown in  imx_ddr_size().

~Yuri

[kris_fei]

I don't understand, the values of these registers group are written in u-boot via DCT table,

so what the meaning of reading? It is still faked.

[Yuri]

Correct sequence, when working with DRAM for i.MX6 is as following :

1) define memory parameters from memory Datasheet and system schematic ;
2) configure memory in a script and test memory using  i.MX6/7 DDR Stress Test Tool V2.52
3) get correct data from the script and port them to U-boot DCD ;
4) configure memory size as hard-coded in U-boot.

5) boot Linux.

DRAM Customization on i.MX6x

Regards,

Yuri.

[kris_fei]

thanks for the detail solution.

We have done what you said above, but 1GB and 2GB are used at the same time,

sometimes tester downloaded the wrong version. So i have no idea to solve it.:smileyconfused:

[Yuri · Accepted solution]

In such case it makes sense to use jumpers on board or configuration EEPROM.

~Yuri.

[kris_fei]

Maybe it's the only way to solve this problem, appreciate!