How to get IEEE 1588 1PPS on i.MX6Q?

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How to get IEEE 1588 1PPS on i.MX6Q?

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frankchenmh
Contributor III

Hi,

I am working on i.MX6Q board to get IEEE 1588 1PPS. The kernel version that I used is 4.1.15. It seems the kernel supports 1588 feature and I use linuxptp to test it. However I couldn't find any document or instructions to enable 1PPS signal. Please help. Thanks!

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1 Solution
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lily_zhang
NXP Employee
NXP Employee

Hello, Frank:

As we talked offline, usually the following steps are required for pps test:

  • Add event0 out pin in dts: MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT   
  • After kernel up, run commands:

ptp4l -A -4 -H -m -i eth0  &

echo 1 > /sys/class/ptp/ptp0/pps_enable

  • Use oscilloscope to capture the pps pin signal. Because the default BSP uses HIGH_PULSE setting, the pulse width is 8ns. You can try to change as TOGGLE mode for the test. It’s easy to capture signal with normal oscilloscope.

File: drivers/net/ethernet/freescale/fec_ptp.c

@@ -206,7 +208,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
                val |= (1 << FEC_T_TF_OFFSET | 1 << FEC_T_TIE_OFFSET);
                val &= ~(1 << FEC_T_TDRE_OFFSET);
                val &= ~(FEC_T_TMODE_MASK);
-               val |= (FEC_HIGH_PULSE << FEC_T_TMODE_OFFSET);
+               val |= (FEC_TMODE_TOGGLE << FEC_T_TMODE_OFFSET);
                writel(val, fep->hwp + FEC_TCSR(fep->pps_channel));

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7 Replies
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hughreynolds
Contributor I

Lily, I also need to get the 1pps out to a pin.

I'd like to use MX6Q_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT as it is the only pin I can get to.

There was an errata reference elsewhere that event2_out was not working.

Does event2 work?

Also we would need a better explanation of how to get your  static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable) installed.

Any help would be much appreciated. I'm happy to be contacted direct.

Regards

Hugh Reynolds

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kbb64
Contributor I

The following from the above answer seems to be outdated in Kernel 3.17 & ptp4l version 1.7

ptp4l -A -4 -H -m -i eth0  &

echo 1 > /sys/class/ptp/ptp0/pps_enable

Or I may have other issues!

************ My problem is that /dev/pps0 is never created

make menuconfig I add in

-*- PPS support │ │
[*] PPS debugging messages │ │
  *** PPS clients support *** │ │
  <M> Kernel timer client (Testing client, use for debug) │ │
<M> PPS line discipline │ │
<M> PPS client using GPIO │ │
*** PPS generators support *** │ │

PTP is autoconfigured

Only when I insmod pps-ktimer.ko does it create a device.

kernel config options for PTP show the following

#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK=y
CONFIG_DP83640_PHY=y
CONFIG_PINCTRL=y

#
# PPS support
#
CONFIG_PPS=y
CONFIG_PPS_DEBUG=y

DTB includes the following

fec {
pinctrl_enet_event0_out: enet_event0_out {
fsl,pins = <
MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT 0x100d1
>;
};
};

When the kernel boots the following is listed


pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6  - Copyright 2005-2007 Rodolfo Giometti  <giometti@linux.it>
PTP clock support registered

So question is "what registers with the pps device to create the /dev/pps0

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lily_zhang
NXP Employee
NXP Employee

Hello, Frank:

As we talked offline, usually the following steps are required for pps test:

  • Add event0 out pin in dts: MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT   
  • After kernel up, run commands:

ptp4l -A -4 -H -m -i eth0  &

echo 1 > /sys/class/ptp/ptp0/pps_enable

  • Use oscilloscope to capture the pps pin signal. Because the default BSP uses HIGH_PULSE setting, the pulse width is 8ns. You can try to change as TOGGLE mode for the test. It’s easy to capture signal with normal oscilloscope.

File: drivers/net/ethernet/freescale/fec_ptp.c

@@ -206,7 +208,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
                val |= (1 << FEC_T_TF_OFFSET | 1 << FEC_T_TIE_OFFSET);
                val &= ~(1 << FEC_T_TDRE_OFFSET);
                val &= ~(FEC_T_TMODE_MASK);
-               val |= (FEC_HIGH_PULSE << FEC_T_TMODE_OFFSET);
+               val |= (FEC_TMODE_TOGGLE << FEC_T_TMODE_OFFSET);
                writel(val, fep->hwp + FEC_TCSR(fep->pps_channel));

View solution in original post

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frankchenmh
Contributor III

Hi Lily,

Thanks! After changing to TOGGLE mode the oscilloscope can capture the 1pps pulse!

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lily_zhang
NXP Employee
NXP Employee

Hello, Frank:

The following patch is used to enable PPS output. You can enable ENET_1588_EVENTx_x Pins in dts and use oscilloscope to capture master pin and slave pin, then comparing the gap.

commit 278d24047891a1bf4a98128eaa8ecafd019e58c2

Author: Luwei Zhou <b45643@freescale.com>

Date:   Fri Oct 10 13:15:30 2014 +0800

net: fec: ptp: Enable PPS output based on ptp clock

FEC ptp timer has 4 channel compare/trigger function. It can be used to enable pps output. The pulse would be ouput high exactly on N second. The pulse ouput high on compare event mode is used to produce pulse per second.  The pulse width would be one cycle based on ptp timer clock source. Since 31-bit ptp hardware timer is used, the timer will
wrap more than 2 seconds. We
need to reload the compare compare event about every 1 second.

    Signed-off-by: Luwei Zhou <b45643@freescale.com>

Signed-off-by: David S. Miller davem@davemloft.net

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Frank

it is necessary to use appropriate phy which could produce

1588 1PPS. Regarding software please

follow Chapter 44 ENET IEEE-1588 Driver attached Linux Manual.

Best regards

igor

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frankchenmh
Contributor III

Hi igor,

Thanks a lot for your reply!

If I am correct, the IEEE 1588 feature on i.MX6 Linux Kernl is implemented on MAC level (FEC), but not the PHY level. The MAC (FEC) should be able to generate 1PPS. Actually the pin of i.MX6Q that can be used as 1PPS is ENET_1588_EVENT0_OUT (muxed with GPIO_19). It looks like the kernel should have supported this feature, but I failed to find any document or test application for it.

I checked Linux Manual chapter 44 but it doesn't describe how to get 1PPS.

Thanks!

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