How to enable i.mx6 DDR CLK and LVDS clk's SSC(Spread Sprectrum)?

[弗雷德]

EMC test result show DDR CLK 396MHz and 1080MHz is higher than limit. and 352M, 1056M and 1408M related to LVDS CLK 50MHz are also higher than limit. I want to SSC to DDR clk and LVDS clk to reduce the radiation for these frequency points.

But I can't find the related information in i.mx6 dl datasheet. Does anybody have the experience on this?

[igorpadykov]

Hi

for enabling please set spread spectrum for parent pll, refer to example on

enable the spread spectrum 

Best regards
igor
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[弗雷德]

Hi 

Thanks for your reply. Can I ask another question?

what is the limit for Modulation Frequency and Spectrum spread range? 5% or 10% or something like this.