How to enable hardware flow control for uart in L3.10.17

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How to enable hardware flow control for uart in L3.10.17

1,761 次查看
宗標廖
Contributor V

Hello!

I am now working on a custom i.MX6Q board with Yocto(3.10.17_1.0.2),and I want to enable HW

flow control for UART2(Which is used for BT module).

When I worked with LTIB(3.0.35),I set the UART2 as below.

1)pin config

    MX6Q_PAD_GPIO_7__UART2_TXD,

    MX6Q_PAD_GPIO_8__UART2_RXD,

    MX6Q_PAD_EIM_D28__UART2_CTS,   

    MX6Q_PAD_EIM_D29__UART2_RTS,

2)set CTSRTS flag.

   static const struct imxuart_platform_data mx6_xxxx_uart2_data __initconst = {

    .flags      = IMXUART_HAVE_RTSCTS,

   };

static inline void mx6q_xxxx_init_uart(void)

{

    ......

    imx6q_add_imx_uart(1, &mx6_xxxx_uart2_data);    /* UART2:BT */

   .......

}

Then I test the UART2 with /unit_test/mxc_uart_xmit_test

./mxc_uart_xmit_test.out /dev/ttymxc1 -B 115200 -HW

The terminal output logs sent 10000 bytes with speed 105540.897098bps

According to the logs, the hardware flow control is enabled for UART2.

-------------------------------------------------------------------------------------------------------------------

Now I am working with Yocto, and I set the UART2 in device tree files as below.

1)pin config.

       pinctrl_uart2_3: uart2grp-3 {

            fsl,pins = <

                MX6QDL_PAD_GPIO_8__UART2_RX_DATA   0x1b0b1

                MX6QDL_PAD_GPIO_7__UART2_TX_DATA   0x1b0b1

                MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1

                MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1

            >;

        };

2)uart2

/*BT*/

&uart2 {

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_uart2_3>;

    status = "okay";

    fsl,uart-has-rtscts;

};

Then I run the /unit_test/mxc_uart_xmit_test

./mxc_uart_xmit_test.out /dev/ttymxc1 -B 115200 -HW

There is no message like 'sent 10000 bytes with speed .....' output.

------------------------------------------------------------------------------------------------------------------------

In the LTIB case,when it is running  mxc_uart_xmit_test, the UART2_RTS pin is always low.

But in the Yocto case,the UART2_RTS pin is always high.

I don't know whether is there something wrong with L3.10.17?

Could you help me.Thank you.

Best Regards,

ZongbiaoLiao

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1,328 次查看
宗標廖
Contributor V

Hello

Community

There is nothing wrong with L3.10.17.

I found it was something related to our hardware design.

Best Regards,

ZongbiaoLiao

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alejandrolozan1
NXP Employee
NXP Employee

Hi,

Thanks for letting us know that there was no problem. Would you be nice enough to provide the solution to your problem?

That will help future customers.

Best Regards,

Alejandro

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