How to enable core1 on i.MX7D

[tamotsu]

Hi.

Which register should I set to enable core1 on i.MX7D?

Even if I set bit 2 of 6.2.7.3 A7 Reset Control Register in the Reference Manual to '1', there is no response.

Thank yoi.

[joanxie]

is it your typo? bit2 is for reserved, should be bit1

[tamotsu]

Hi.

I'm sorry.

Bit 1 is correct.

The JTAG_MOD pin on the i.MX7D SABRE board  is connected to a 10K pull-up register and a 4.7K pull-down register, but is the MPU in JTAG mode or SW mode?

Thank you.

[joanxie · Accepted solution]

refer to the schematic, the pull-up is DNP, When JTAG_MOD is low, the JTAG interface is configured for common software debug,