How to enable clock output on LVDS1_CLK via device tree?

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How to enable clock output on LVDS1_CLK via device tree?

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cbobek
Contributor I

Hi Community,

 

We are migrating our existing custom i.MX6DL design from a Linux 3.0.101 kernel to 4.9.74.  Our device tree allows the board to boot successfully, but we are having trouble enabling the ETHERNET_REF clock output on the CLK1_N/P (anaclk1/1b) pins.

 

We are able to manually set the CCM_ANALOG_MISC1 register at the Linux prompt and produce the clock, but we do not know the syntax and method for enabling the clock through the device tree.

 

Is there an example device tree that shows how to properly set the LVDS1_CLK mux and enable the output?

 

Thank you,

 

Chris

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Chris

available options for dts (device tree) can be found in

linux/Documentation/devicetree/bindings and may be useful to check ../net/fsl-fec.txt

linux-imx.git - i.MX Linux Kernel 

but and I am afraid there are no options for generating selected  LVDS1_CLK output.

In general one can add such option in driver, as example one can look at property

"phy-reset-duration", described in linux/Documentation/devicetree/bindings/net/fsl-fec.txt
and used in linux/drivers/net/ethernet/freescale/fec_main.c

Best regards
igor
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