How to enable QSPI1 on imx7DSABRE Board

[nguyentd3]

I am try to enable QSPI module on the imx7DSABRE by using C Spy&IAR, but it seem that is not to work correctly.

Here is my C SPY: 

/** Select QSPI2 Clock from PLL2 and divider 2.
SCLK to the QSPI flash will be 66MHz **/
/* CCM Base address on imx7D 0x30380000 */
tmp = __readMemory32(0x30380000,"Memory"); //read QuadSPI_MCR
tmp &= ~((0x3F<<21) | (0x7<<18) | (7<<15)); //qspi2_clk_podf = 0;
tmp |= ((0x0<<26) | (0x1<<25) | (1<<14)); //qspi2_clk_pred = 1; qspi2_clk_sel = 1;
__writeMemory32(tmp,0x30380000,"Memory"); //write back CCM_CS2CDR

/** Enable QSPI Clock in CCM **/
/* CCM_CCGR4 imx7 0x30384150 */
tmp = __readMemory32(0x30384150,"Memory"); //read CCM_CCGR21
tmp |= (3<<0); //Set Domain 1 No to check req
tmp |= (3<<4); //Set Domain 2 No to check req
tmp |= (3<<12); //Set Domain 3 No to check req
__writeMemory32(tmp,0x30384150,"Memory"); //write back CCM_CCGR21

/** IOMUX config **/
/*QSPI1A1 pins init*/
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA00) ALT2_QSPI_A_DATA0 0x30330034[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA01) ALT2_QSPI_A_DATA1 0x30330038[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA02) ALT2_QSPI_A_DATA2 0x3033003C[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA03) ALT2_QSPI_A_DATA3 0x30330040[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA04) ALT2_QSPI_A_DQS 0x30330044[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA05) ALT2_QSPI_A_SCLK 0x30330048[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA06) ALT2_QSPI_A_SS0_B 0x3033004C[1:0] */
/* (IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA07) ALT2_QSPI_A_SS1_B 0x30330050[1:0] */
__writeMemory32(0x2,0x30330034,"Memory");
__writeMemory32(0x2,0x30330038,"Memory");
__writeMemory32(0x2,0x3033003C,"Memory");
__writeMemory32(0x2,0x30330040,"Memory");
__writeMemory32(0x2,0x30330044,"Memory");
__writeMemory32(0x2,0x30330048,"Memory");
__writeMemory32(0x2,0x3033004C,"Memory");
__writeMemory32(0x2,0x30330050,"Memory");
__var tmp;
tmp = __readMemory32(0x60000000, "Memory");
__message "Try to read 0x60000000 = ", tmp:%x;

tmp = __readMemory32(0x60002000, "Memory");
__message "Try to read 0x60002000 = ", tmp:%x;

tmp = __readMemory32(0x60005000, "Memory");
__message "Try to read 0x60005000 = ", tmp:%x;

tmp = __readMemory32(0x60006000, "Memory");
__message "Try to read 0x60006000 = ", tmp:%x;

Data read is always "zero" values although its' values at these addresses(0x60000000, 0x60002000, ...) is non-zero.

And all QSPI1 Pins have no any signals while transferring that is checked by oscilloscope

Could Anyone please figure out my mistakes in that settings for QSPI1 module on imx7DSABRE board.

Thanks & Best Reagards,

Truong Dinh Nguyen (Mr.)

Senior Embedded Software Developer

FPT Software

E-mail   : nguyentd3@fsoft.com.vn

[nguyentd3]

Hi igorpadykov!

I downloaded FreeRTOS_iMX7D_1.0.1 and run 'hello_world_qspi example' on Windows 10, but it cannot write to memory. Please see the error below.

Can you give me a guide to write to memory area (0x60100000)?

Thu Jun 27, 2019 18:09:10: IAR Embedded Workbench 8.40.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\bin\armproc.dll)
Thu Jun 27, 2019 18:09:10: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\config\debugger\NXP\iMX7_M4.dmac
Thu Jun 27, 2019 18:09:10: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\config\debugger\NXP\iMX7_Trace.dmac
Thu Jun 27, 2019 18:09:10: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\config\debugger\NXP\iMX7_Common.dmac
Thu Jun 27, 2019 18:09:10: Loading the I-jet driver
Thu Jun 27, 2019 18:09:10: Probe: Probe SW module ver 1.61
Thu Jun 27, 2019 18:09:10: Probe: Option: trace(Auto,size_limit=100%)
Thu Jun 27, 2019 18:09:10: Probe: Found I-jet, SN=78430
Thu Jun 27, 2019 18:09:10: Probe: Opened connection to I-jet:78430
Thu Jun 27, 2019 18:09:10: Probe: USB connection verified (10594 packets/sec)
Thu Jun 27, 2019 18:09:10: Probe: I-jet, FW ver 4.2, HW Ver:A
Thu Jun 27, 2019 18:09:10: Probe: None or IJET-MIPI10 adapter detected
Thu Jun 27, 2019 18:09:10: Probe: Versions: JTAG=1.84 SWO=1.40 A2D=1.72 Stream=1.50 SigCom=2.44
Thu Jun 27, 2019 18:09:10: IMX7 device specific processor status testing in use.
Thu Jun 27, 2019 18:09:10: Emulation layer version 4.48
Thu Jun 27, 2019 18:09:10: JTAG clock detected: 12MHz
Thu Jun 27, 2019 18:09:10: JTAG chain "TDI->TAP#0[Cortex:IR=4]->TDO" verified.
Thu Jun 27, 2019 18:09:10: Notification to core-connect hookup.
Thu Jun 27, 2019 18:09:10: Connecting to TAP#0 DAP AHB-AP-CM port 4 (IDR=0x24770011).
Thu Jun 27, 2019 18:09:10: Recognized CPUID=0x410fc241 Cortex-M4 r0p1 arch ARMv7-M
Thu Jun 27, 2019 18:09:10: Debug resources: 6 instruction comparators, 4 data watchpoints.
Thu Jun 27, 2019 18:09:10: LowLevelReset(system, delay 200)
Thu Jun 27, 2019 18:09:11: Loaded debugee: C:\nxp\FreeRTOS_BSP_1.0.1_iMX7D\examples\imx7d_sdb_m4\demo_apps\hello_world_qspi\iar\debug\hello_world_qspi.out
Thu Jun 27, 2019 18:09:11: Download error at 0x60100000: memory write failed.

[igorpadykov]

please check linker file MCIMX7D_M4_qspia.icf in /platform directory

for write permissions

Best regards
igor

[nguyentd3]

C:\nxp\FreeRTOS_BSP_1.0.1_iMX7D\platform\devices\MCIMX7D\linker\iar\MCIMX7D_M4_qspia.icf

I don't see it wrong

/*
** ###################################################################
** Processors: MCIMX7D7DVK10SA
** MCIMX7D7DVM10SA
** MCIMX7D3DVK10SA
** MCIMX7D3EVM10SA
**
** Compiler: IAR ANSI C/C++ Compiler for ARM
** Reference manual: IMX7DRM, Rev.A, February 2015
** Version: rev. 1.0, 2015-05-19
**
** Abstract:
** Linker file for the IAR ANSI C/C++ Compiler for ARM
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** ###################################################################
*/

define symbol m_interrupts_start = 0x60100000;
define symbol m_interrupts_end = 0x6010023F;

define symbol m_text_start = 0x60100240;
define symbol m_text_end = 0x60107FFF;

define symbol m_data_start = 0x20000000;
define symbol m_data_end = 0x20007FFF;

/* Sizes */
if (isdefinedsymbol(__stack_size__)) {
define symbol __size_cstack__ = __stack_size__;
} else {
define symbol __size_cstack__ = 0x0400;
}

if (isdefinedsymbol(__heap_size__)) {
define symbol __size_heap__ = __heap_size__;
} else {
define symbol __size_heap__ = 0x0400;
}

define exported symbol __VECTOR_TABLE = m_interrupts_start;
define exported symbol __FLASH_START = m_interrupts_start;
define exported symbol __FLASH_END = m_text_end;

define memory mem with size = 4G;
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
| mem:[from m_text_start to m_text_end];
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];

define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

initialize by copy { readwrite, section .textrw };
do not initialize { section .noinit };

place at address mem: m_interrupts_start { readonly section .intvec };
place in TEXT_region { readonly };
place in DATA_region { block RW };
place in DATA_region { block ZI };
place in DATA_region { last block HEAP };
place in CSTACK_region { block CSTACK };

Thanks & Best Reagards,

Truong Dinh Nguyen (Mr.)

Senior Embedded Software Developer

FPT Software

[igorpadykov]

>Can you give me a guide to write to memory area (0x60100000)?

define symbol m_interrupts_start = 0x60100000;

mem: m_interrupts_start { readonly section .intvec };

[nguyentd3]

Hi Igor,

Thank so much for your supporting, 

Our test app has been programmed to Flash and booted from Flash successfully.

Reason of this problem is invalid for sections .conf, .ivt, .app_image

• QSPI Configuration: 0x60000000
• Interupt Vector Table: 0x6000400
• Application: 0x60001000

Regards,

Nguyen Truong

[igorpadykov]

Hi Nguyen

one can look at hello_world_qspi example in FreeRTOS_iMX7D_1.0.1, pay

attention to rdc configuration

https://www.nxp.com/webapp/Download?colCode=FreeRTOS_iMX7D_1.0.1_WIN&appType=license 

https://www.nxp.com/webapp/Download?colCode=FreeRTOS_iMX7D_1.0.1_LINUX&appType=license 

Best regards
igor
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