How to enable DDR Controller access on IMX8MMini on A53 core

[mare1490]

Hello,

I am writing bare metal application on IMX8MMini EVK for Cortex A53. I am trying to enable DDR Controller, but when I try to access it's memory mapped location (from 0x3c00 0000)  it can not access it.

I enabled all PLLs (Sys pll1, 2,3 and got dram_pll_lock with DRAM PLL set to 800 MHz).

Please notice that this is Bare Metal app. I am not using U boot or any other boot loader.  Basically, before my app is only BootRom code. I am using Lauterbach tools for downloading the app and debugging.

Perhaps I am missing some CCGR bit, or some other clock that I am not aware of. I have tried to follow the steps from U boot source code, but it is little complicated to follow. Perhaps the access is denied as this memory is occupied. I really do not have a clue. I have set A53 to master assignment in RDC and also in PGC, and enabled CPU mapping in PGC.

Also, I do not know if this is relevant or not, but I have not enabled MMU in my app.

Also, please note that  with MSCALE_DDR_Tool I get everything Ok, but in My code, when I try to follow the memory values that tool is setting, I can not access to DDRC peripheral memory.

Questions:

1. I am not sure if Uboot is enabling DDRC or is that done before Uboot, in SPL, ATF or SCFW?

2. What are the steps to follow to enable DDRC and to access it from A53 core?? Can you point out the relevant parts and resources to check it out while developing this?

Thank you in advance.

Best regards,

Marko

[igorpadykov]

Hi Marko

1. ROM code loads u-boot-spl to IRAM to initialize DDR memory.
u-boot-spl and rest u-boot image are packed to one image with DDRPHY
firmware and ATF by imx-mkimage tool.

README\imx8mm_evk\freescale\board - uboot-imx - i.MX U-Boot 

imx8mm_bl31_setup.c\imx8mm\imx8m\imx\plat - imx-atf - i.MX ARM Trusted firmware 

2. I believe uboot is only available example

imx8mm_evk\freescale\board - uboot-imx - i.MX U-Boot 

Best regards
igor
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[mare1490]

Hello,

I have one more question..

While investigating uboot source code I have noticed in the path "u-boot-fslc\arch\arm\mach-imx\imx8m\"

the file called imximage.cfg where the code loads .bin file for DDR FW:

DDR_FW lpddr4_pmu_train_1d_imem.bin
DDR_FW lpddr4_pmu_train_1d_dmem.bin
DDR_FW lpddr4_pmu_train_2d_imem.bin
DDR_FW lpddr4_pmu_train_2d_dmem.bin

Basically without those .bin file I can not initialize and train DDR FW on IMX8MMini board, is that right?

Where can I get those .bin file? Are those given by Synopsis? I think those .bin file are available in mscale_ddr_tool that is used for calibration of DDR memory.

What are the addresses where we must load that firmware??

My assumption is that I can not write bare metal app for initializing ddr memory without those bin file? Is my assumption correct?

Thank you in advance,

Marko

[mare1490]

Thank you for quick answer. That is what I thought but I had to check.

Best regards,

Marko