How to disable 'Stop Timeout Reset' in iMX7ULP

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How to disable 'Stop Timeout Reset' in iMX7ULP

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jaiganesh_sridh
Contributor III

Hello,

This is regarding a custom board based on imx7ulp. I cannot get the A7 Linux system to go into low power mode (VLLS) mode. Linux command used:

echo mem > /sys/power/state

The system goes to sleep and wakes up immediately (without any interrupts). From analysis, the following bit is set after system wakes up immediately

MSMC1 module - System Reset Status (SRS) - Bit 11 -> STOPACK

                                                                          - Bit 4 -> WARM

 

According to reference manual:

STOPACK: Stop Timeout Reset
Indicates a reset has been caused by a timeout in the Stop mode entry logic. This timeout is generated if
a peripheral does not acknowledge entry into any Stop mode within approximately one second.
0b - Reset not generated by Stop Controller Timeout.
1b - Reset generated by Stop Controller Timeout.

 

May I know if it is possible to disable this stop controller timeout ?

I have looked into the registers - Core Software Reset Enable (CSRE), System Reset Interrupt Enable (SRIE). But both these registers always returns zero which means this is already disabled but somehow still i am getting Reset generated by Stop Controller Timeout.

 

Can someone explain how this feature works and any other information regarding the same?

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igorpadykov
NXP Employee
NXP Employee

Hi Jai

 

>May I know if it is possible to disable this stop controller timeout ?

 

I am afraid it is not possible, sorry. For immediate wake up issue may be recommended

to check if some module have pending interrupts. As for software examples one can look

at M4 SDK_EVK-MCIMX7ULP   ../demo_apps/power_mode_switch  available on

https://mcuxpresso.nxp.com/en/welcome

 

Best regards
igor

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jaiganesh_sridh
Contributor III

Hi Igor,

There are no pending interrupts (Found by seeing interrupt status registers after immediate wakeup).

From analysis, it seems its because of display stack. When i dont stream anything onto the display, sleep/wakeup of Linux is working good.

I am trying to find if LCD interface or MIPI DSI interface would be the cause of 'STOP timeout' trigger.

Please let me know if you have insights of what might be happening on the display side.

 

Regards,

Jai Ganesh Sridharan

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