How to configure CSI1 to capture embad sync PAL video in IMX6 solo

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How to configure CSI1 to capture embad sync PAL video in IMX6 solo

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liulensan
Contributor I

Hi all:

     We re-design a hardware which is reference to SABRE smart device, the software base is Freescale's 3.10.17-1.0.0 Yocto BSP, kernel version: 3.10.17-r0.

     We connect a MIPI device to CSI0 and connect a TV AD transfer chipset to CSI1.

     Currently the MIPI device is work well and we can capture the video, but we can not capture the video from CSI1 which connected to a TV-in device.

     Please help to check the configure. Thank you!

     We connect EIM_ADDR16 as IPU1_CSI1_PIXCLK, and EIM_ADDR17~EIM_ADDR24 as IPU1_CSI1_DATA12~19.

     We use EAV/SAV embad sync code to sync line and frame, so we do not have hsync and vsync pin.

     Following is our software configure:

                pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */

                        fsl,pins = <

                                MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK    0x80000000

                                MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12    0x80000000

                                MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13    0x80000000

                                MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14    0x80000000

                                MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15    0x80000000

                                MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16    0x80000000

                                MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17    0x80000000

                                MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18    0x80000000

                                MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19    0x80000000

                        >;

                };

          pinctrl-names = "default";

          pinctrl-0 = <&pinctrl_ipu1_2>;

          clocks = <&clks 201>;

          clock-names = "csi_mclk";

          pwn-gpios = <&gpio7 12 0>;  /* power down pin */

          csi_id = <1>;

          mclk = <27000000>;

          mclk_source = <0>;

          cvbs = <1>;

    Following is the driver configure in ioctl_g_ifparm function:

static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)

{

     memset(p, 0, sizeof(*p));

     p->if_type = V4L2_IF_TYPE_BT656;

     p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_BT_8BIT;

     p->u.bt656.latch_clk_inv = 0;  // I check the signal, which is sample at clock rise edge, I am not sure whether need set as "1" and I also test is as"1"

     return 0;

}

Now my input signal source is a PAL format signal, I use following test command to capture video,

But I can not receive any data(I add some log at the csi_enc_callback function of  ipu_fg_overlay_sdc.c and ipu_bg_overlay_sdc.c)

./mxc_v4l2_overlay.out -di /dev/video1 -iw 720 -ih 576 -it 0 -il 0 -ot 20 -ol 20 -ow 720 -oh 576

So please help to check it.

Thank you!

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Liu

for TV-in device should be used mxc_v4l2_tvin.c, please check

example in imx-test package

http://repository.timesys.com/buildsources/i/imx-test/imx-test-3.10.17-1.0.0/

Best regards

igor

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liulensan
Contributor I

Hi igorpadykov:

    Thank you for your response!

    I also use mxc_v4l2_tvin test program to check this issue.

    But it also can not receive any data.

./mxc_v4l2_tvin.out -ow 720 -oh 625 -ol 10 -ot 20 -f YU12

   Please help to check above code, I am not sure the source code is right.

   1. EIM_A16 - EIM_A24 is configure as CSI1?

   2. ioctl_g_ifparm is configured as BT656 embaded sync(EAV/SAV) mode?

   3. If the pixel clock is sample at rising edge, then how to configure  p->u.bt656.latch_clk_inv at ioctl_g_ifparm?

   Thank you very much!

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Liu

suggest to look at link below, it shows how to debug that

https://community.freescale.com/docs/DOC-93633#comment-2673

Best regards

igor

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liulensan
Contributor I

Hi :

    I have add the d-interlace patch, but it still can not capture any data.

    I use following command to test it:

./mxc_v4l2_tvin_vdi.out -ow 720 -oh 480 -ol 10 -ot 20

or

./mxc_v4l2_tvin_vdi.out -ow 720 -oh 480 -ol 10 -ot 20 -f YU12

or

./mxc_v4l2_tvin_vdi.out -ow 720 -oh 480 -ol 10 -ot 20 -f UYVY

   I get following error:

ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0

VIDIOC_DQBUF failed.ipu_request_irq irq: 0, name: (null)

By the way, following is my kernel configure:

# CONFIG_MXC_IPU_DEVICE_QUEUE_SDC is not set

CONFIG_MXC_IPU_VDI_ENC=y

CONFIG_MXC_IPU_PRP_VF_SDC=y

CONFIG_MXC_IPU_PRP_ENC=y

CONFIG_MXC_IPU_CSI_ENC=y

CONFIG_VIDEO_MXC_IPU_OUTPUT=y

CONFIG_VIDEO_MXC_PXP_V4L2=y

I am not sure which one is needed: CONFIG_MXC_IPU_DEVICE_QUEUE_SDC  or CONFIG_MXC_IPU_PRP_VF_SDC?

Could you give me some suggest?

Thank you!

By the way, EIM_A16 - EIM_A24 is configure as CSI1 or CSI0?

Thank you very much!

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igorpadykov
NXP TechSupport
NXP TechSupport

From experts:

-----------------------------------------------------------

I suggest customer to use i.MX6 Automotive board and BSP that uses and external video decoder (ADV7180) as example.

There are many things to check, including the configuration of customer's own decoder IC and its hardware. If not possible to use a Freescale board as reference, I'd suggest to contact Freescale Professional Services or a 3rd party design house to help on this project.

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Best regards

igor

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