Hi @nxf54947,
Thank you for your suggestion!
I tried different clock sources and got constant 50Mhz by using SYSTEM_PLL1_DIV4(IMX8MM_SYS_PLL1_200M in the DTS) as parent clock. But now I am getting a strange issue.
When I set the clock parent to SYSTEM_PLL1_DIV4 for 50Mhz CLKO1, I am unable to perform I2C R/W transaction with the camera.
I am using I2C3 (same as OV5640 on i.MX8MM) for communicating with the camera.
I measured the SCL and observed that the clock rate does not remain constant at 100Khz (as set in the DTS), but instead jumps to approx. 50Mhz intermittently.
When I set clock rate at 24Mhz with SYSTEM_PLL1_DIV4 as parent clock, the SCL remains constant at 100Khz and I am able to perform I2C R/W operation on camera successfully.
The updated DTS node looks like this:
&i2c3 {
camera: camera@3c {
compatible = "camera";
reg = <0x3c>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_camera_rst>;
reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MM_CLK_CLKO1>;
clock-names = "csi_mclk";
assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_200M>;
assigned-clock-rates = <50000000>;
mclk = <50000000>; // unused property
port {
camera_ep: endpoint {
remote-endpoint = <&mipi1_sensor_ep>;
};
};
};
};
I have attached the clock summary for reference.
I don't see any relation between I2C3_ROOT_CLK and IMX8MM_CLK_CLKO1 to cause such an issue.
What could be causing such effect? Am I supposed to modify something else along with the assigned-clock-parents which I might have missed?
Regards,
Naman