How to change RGMII pad characteristics from device tree?

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How to change RGMII pad characteristics from device tree?

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zandar
Contributor II

Is there a convenient way to change DDR_SEL and ODT values of the RGMII group of pins without touching the source code? That is from a device tree?

In general to change functions of pins one can easily use the fsl,pins = <PIN_FUNC_ID CONFIG> property.

This is also used to change some bits in the pad configuration register using the CONFIG value.

Unfortunately the DDR_SEL and ODT (among others) register bits in the pad configuration register are read-only and need to be configured using the pad group control registers. How (if at all) can this be done from device tree?

I do not think setting those bits directly from bootloader or from machine platform files is a proper solution. That will be a blocker for upstreaming my board device trees.

My SoC is i.MX6Solo and i.MX6DualLite, RGMII is used to connect a QCA8334 Ethernet switch.

Thanks for any hints.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Michal

rgmii is used by uboot so there may be no way to change pad settings later in linux.

Best regards
igor
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zandar
Contributor II

Hi Igor, thanks for the reply.

AFAIK the RGMII pads may not be used by bootloader at all. Unless the interface is used for TFTP boot for example. If this is not the case the only responsibility of the bootloader is to set pads to a safe state. Than Linux can later reconfigure the pads to whatever the HW design requires. Linux has a very convenient way to configure pad's characteristics from device tree. As I wrote in my original post, a fsl,pins = <PIN_FUNC_ID CONFIG> property is used for that. So Linux can change pad settings. The issue is that some bits (DDR_SEL and ODT) in the individual RGMII pad control registers are read-only. To tweak those parameters (signal voltage and termination resistors) one need to use the pad group control registers for the whole RGMII pad group. And I could not find any other way to do that than hacking-in some lines into the imx6q_init_machine(void) function in arch/arm/mach-imx/mach-imx6q.c source. Seems totally inappropriate to me. As I want to push support for my board upstream this needs to be done from device tree or solved in some universal way.

Any other ideas? Thanks in advance.

Michal

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Michal

in general one can add such settings in driver fec_main.c using function "of_property_read_u32()"

fec_main.c\freescale\ethernet\net\drivers - linux-imx - i.MX Linux kernel 

Best regards
igor

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zandar
Contributor II

Thanks Igor. That is almost exactly the same what I am doing now. With the difference that I am doing this using "syscon_regmap_lookup_by_compatible()" from machine init and not from fec driver. I do not want to do it this way as this is not correct and it is a blocker for upstreaming my board support. Lets have your (NXP) board as an example:

imx6qdl-sabreauto.dtsi\dts\boot\arm\arch - linux-imx - i.MX Linux kernel

The value 0x1b030 next to MX6QDL_PAD_RGMII_xxx pins translates into:

- DSE - 37/28 Ohm @ 2.5V, 36/32 Ohm pd/pu @ 1.8V

- ODT - R/O field, This property can be configured using Group Control Register

- PKE - Pull/Keeper Enabled
- PUE - Pull Enabled
- PUS - 100K Ohm Pull Up

- HYS - Schmitt trigger input
- DDR_INPUT - CMOS input mode

- DDR_SEL - R/O field, This property can be configured using Group Control Register

1. How would you set the ODT and DDR_SEL field for those RGMII pins in case your board design requires it?

2. How would you do that in a clean way? So no hacks to fec_main.c or similar.

The pad configuration is propagated nicely from device tree to the drivers/pinctrl/freescale/pinctrl-imx.c

So I am looking for some generic solution how to handle the pad group control registers as well.

Any other ideas how to do that?

Thanks, Michal.

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