How to allocate the GPIOS of i.MX8QM

[wujie12341]

Dear Mrs or Mr.

I wanna know How to allocate the GPIOS of i.MX8QM?

According to the Pins_tool of i.MX8QM，we know that there are 7 GPIO modules at most in the i.MX8QM.

As below:

LSIO_GPIO0/1/2/3/4/5/6.

According to the IMX8_Hardware_Developers_Guide_v0.5，the GPIO modules should be allocated within different

software system for security reasons.

As below:

1  SCU.GPIO0 for SCU
2 LSIO.GPIO0 for M4_0
3 LSIO.GPIO1 for M4_1
4 LSIO.GPIO2 for secure AP
5 LSIO.GPIO3-6 for non-secure AP

Question NO.1

I wonder if  Cortex A core could have access to anyone of the 7 GPIO modules?

Question NO.2

I wonder if  Cortex M core could have access to anyone of the 7 GPIO modules?

Question NO.3
I wonder if  SCU could have access to anyone of the 7 GPIO modules?
Question NO.4

We know that the voltage of GPIO module is decided to the voltage of  GPIO banks. Does the voltage of every GPIO module should be the same?like 1.8V or 3.3V 。For example I wanna the LSIO_GPIO0_00 1.8V LSIO_GPIO0_01 3.3V at the same time.

[igorpadykov · Accepted solution]

Hi 清 曹 

IO setting is done by the SCU so please check SCF Porting Kit on

Linux 4.14.62_1.0.0_Beta, SCFWKIT is available on link:
Alpha / Beta BSPs for Microprocessors|NXP 

SCFW Porting Kit

https://www.nxp.com/webapp/Download?colCode=L4.14.62_1.0.0_Beta_SCFWKIT&appType=license&location=nul... 

For questions please ask for documentation in local nxp marketing office, note this processor

is not publicly released yet and not fully supported.

Best regards
igor
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[wujie12341]

Hi igorpadykov,

Thank you for your prompt reply to my issue.

BRs

 Caoqing.