How to add new SPI device to the device tree and compile it?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

How to add new SPI device to the device tree and compile it?

35,392 Views
lmhdoms
Contributor III

Hello,

On the Wandboard Quad we have added an ENC28J60 SPI device to ESCPI3, SS0. I am using the kernel 3.10.17 and now I try to modify the dts in order for the kernel to detect and load the correct kernel module.

Here is the new entry in the imx6qdl-wandboard.dtsi:

&ecspi3 {

    fsl,spi-num-chipselects = <1>;

    cs-gpios = <0>;    /* <&gpio4 24 0>; */

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_ecspi3_1>;

    status = "okay";

    ethernet: enc28j60@0 {

        #address-cells = <1>;

        #size-cells = <1>;

        compatible = "microchip,enc28j60";

        spi-max-frequency = <20000000>;

        reg = <0>;

    };

}

And in the &iomuxc section added the SS pin function (MISO, MOSI, CLK already configured in imx6qdl.dtsi) :

ecspi3 {
   pinctrl_ecspi3_1: ecspi3grp-1 {
   fsl,pins = <
MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0    0x100b1   /* SS ENC28J60 */
   >;
   };

    };

When loading the kernel it correctly probes ECSPI3 and the enc28j60 driver is loaded. But probing the device fails:

enc28j60 spi32765.0: enc28j60 Ethernet driver 1.01 loaded

enc28j60 spi32765.0: enc28j60 chip not found

enc28j60: probe of spi32765.0 failed with error -5

Am I missing something in the dts? what does error -5 indicate?

In order to recompile the dtb I do "bitbake linux-wandboard -c install -f", but it takes time... so I tried "make imx6q-wandboard.dtb" but it initiates a kernel configuration prompt... what is the quickest way to recompile the dtb?

Thanks and regards,

Lars

Labels (3)
0 Kudos
13 Replies

7,684 Views
lmhdoms
Contributor III

Hi all,

Here are the latest news. I updated to 'daisy' and still got the error -5 for the ENC28J60. Then I moved to the more relevant KS8852 which offers fast ethernet speed. With the following dts the device is probed and functional:

&ecspi3 {

  fsl,spi-num-chipselects = <1>;

  cs-gpios = <&gpio4 24 0>;

  pinctrl-names = "default";

  pinctrl-0 = <&pinctrl_ecspi3_1>;

  status = "okay";

  ethernet: ks8851@0 {

  #address-cells = <1>;

  #size-cells = <1>;

  compatible = "micrel,ks8851";

  spi-max-frequency = <28000000>;

  reg = <0>;

  interrupt-parent = <&gpio5>;

  interrupts = <7 0x2>; /* 2=falling edge trigger */

  };

};

ecspi3 {
pinctrl_ecspi3_1: ecspi3grp-1 {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24  0x80000000
>;
};
};

I measured the average throughput to only 1.2Mbps making it too slow for my purpose. The clock to the device reach a maximum of 20MHz but large gaps between transmitting bursts of data lowers the average throughput. So I gave up on using SPI to drive a secondary ethernet port. Other suggestions? USB, parallel bus, PCIex?

Thanks and regards,

Lars

0 Kudos

7,684 Views
YixingKong
Senior Contributor IV

Imhdoms

This discussion is closed since no activity. If you still need help, please feel free to reply with an update to this discussion, or create another discussion.

Thanks,

Yixing

0 Kudos

7,684 Views
YixingKong
Senior Contributor IV

Imhdoms

Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.

Thanks,

Yixing

0 Kudos

7,684 Views
fabio_estevam
NXP Employee
NXP Employee

Lars,

This post may be helpful:

iMX233 + ENC28J60 - Successful (kernel 3.9.3)!

It shows enc28j60 working on mx23 with device tree.

0 Kudos

7,684 Views
fabio_estevam
NXP Employee
NXP Employee

Lars,

For the spi you should configure the chip select as gpio function:

MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24     0x80000000

It would be nice if you could add the device tree support for enc28j60 upstream.

Regards,

Fabio Estevam

0 Kudos

7,684 Views
lmhdoms
Contributor III

Hi Fabio,

I tried to configure CS as GPIO:

&ecspi3 {

    fsl,spi-num-chipselects = <1>;

    cs-gpios = <&gpio4 24 0>;

...

and in iomux:

   MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24    0x80000000    /* GPIO4_24 SPI ethernet SS */

But still error -5.

Then I tried to specify SS0 (rather than GPIO CS):

&ecspi3 {

    fsl,spi-num-chipselects = <1>;

    cs-gpios = <0>; /* Assume this is how we say do not use GPIO for CS!? */

...

and in iomux:

  
/*   MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24    0x80000000*/    /* GPIO4_24 SPI ethernet SS */

and:

ecspi3 {

        pinctrl_ecspi3_1: ecspi3grp-1 {

            fsl,pins = <

                MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1

                MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1

                MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1

                MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0  0x100b1 /* assume ENC28J60 uses slave select */

            >;

        };

    };

Probing still fails with -5.

I hooked up a logic analyzer and do not see any clk when the kernel loads. I will investigate more about what -5 is.

Once I get it to work I will be happy to submit a patch upstream.

Any help is appreciated :-)

Thanks and regards,

Lars

0 Kudos

7,684 Views
fabio_estevam
NXP Employee
NXP Employee

Lars,

The imx spi linux driver needs to use the chip select as GPIO (this was needed for earlier chips in order to workaround some errata).

So you need to do:

ecspi3 {

        pinctrl_ecspi3_1: ecspi3grp-1 {

            fsl,pins = <

                MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1

                MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1

                MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1

                MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24    0x80000000

              

            >;

        };

    };

Regards,

Fabio Estevam

7,684 Views
lategoodbye
Senior Contributor I

Hi Lars,

first of all i don't have a imx6, so i'm not familiar with it's device tree structure.

1. Do you use a specific patch to add devicetree support for enc28j60? As far i know the mainline driver still lacks this feature.

2. To your device tree: looks good, but it's possible that you missed the interrupt pin of the enc28j60.

3. The error code isn't very helpful. You should increase verbosity of the kernel messages.

BR Stefan

0 Kudos

7,684 Views
lmhdoms
Contributor III

Yes, I was in fact missing the interrupt input specification. After adding it, the KS8852 was also able to receive data (otherwise could only transmit).

0 Kudos

7,684 Views
lmhdoms
Contributor III

Hi Stefan,

1. No special patch, just included the enc28j60 module. Can you point to any resource saying that a patch is required for enc28j60?

2. Possibly, I dont know how to add it and maybe will work on that once I get the device probing to work.

3. Tried to enable kernel debugging, but so no additional information.

Thanks and regards,

Lars

0 Kudos

7,684 Views
lategoodbye
Senior Contributor I

Hi Lars,

1. Please look at this link

http://lxr.free-electrons.com/source/drivers/net/ethernet/microchip/enc28j60.c#L1633

This is the driver structure which should contains the matching table (of_match_table) for device tree support. But in the mainline kernel this member isn't set.

Here is a patch from somebody to add devicetree support, it's not really good but may be it fit to your needs:

https://gist.github.com/bmatusiak/5f9fda110e67d8d554c7

2. An example (i don't know how the interrupt pin of the enc28j60 is connected to the i.MX6):

ethernet: enc28j60@0 {

        #address-cells = <1>;

        #size-cells = <1>;

        compatible = "microchip,enc28j60";

        spi-max-frequency = <20000000>;

        intr-gpio = <&gpio3 10 0>;

        reg = <0>;

    };

A right implementation should map the gpio to a irq (function gpio_to_irq).

3. You needn't recompile the kernel for more debug. The driver accept a parameter for debug level (modinfo enc28j60).

BR Stefan

7,684 Views
lmhdoms
Contributor III

Hi Stefan,

The patch for enc28j60 is interesting, looks like it adds device tree support but why was it never submitted upstream? I did not test it as I moved to test the faster device KS8852.

Regards,

Lars

0 Kudos

7,684 Views
lategoodbye
Senior Contributor I

Hi Lars,

please forget point number 2 in my last answer. My assumption about the right implementation of the interrupt pin was wrong. But the hw solution with the FPGA to deassert the irq isn't acceptable for mainline.

To your question, i think the patch author hadn't the time to fix the comments from the mailing list.

Regards

Stefan

0 Kudos